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authorLee Leahy <leroy.p.leahy@intel.com>2016-05-15 14:13:30 -0700
committerLeroy P Leahy <leroy.p.leahy@intel.com>2016-05-17 23:30:52 +0200
commit3f0fe68c4b29dd279d0169cda715c64e3000f963 (patch)
tree820a7852f52d2b811f95d519eea84f616b877307 /src/soc/intel/quark/include
parent274d20a0652f45ed54834524c485f7ab59bcdf70 (diff)
soc/intel/quark: Perform GPIO initialization
Set the base address and enable the GPIO and legacy GPIO controllers. Call the mainboard routine to initialize the GPIO controllers. TEST=Build and run on Galileo Gen2 Change-Id: I06aed5903d6655d2a0948fb544cf9e0db68faa26 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/14827 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/quark/include')
-rw-r--r--src/soc/intel/quark/include/soc/iomap.h12
1 files changed, 10 insertions, 2 deletions
diff --git a/src/soc/intel/quark/include/soc/iomap.h b/src/soc/intel/quark/include/soc/iomap.h
index 31cf604844..ce92676c54 100644
--- a/src/soc/intel/quark/include/soc/iomap.h
+++ b/src/soc/intel/quark/include/soc/iomap.h
@@ -24,10 +24,18 @@
/* UART MMIO */
#define UART_BASE_ADDRESS CONFIG_TTYS0_BASE
+/* I2C/GPIO Controller */
+#define I2C_GPIO_BASE_ADDRESS 0xa0020000
+
/*
* I/O port address space
*/
-#define ACPI_BASE_ADDRESS 0x1000
-#define ACPI_BASE_SIZE 0x100
+#define ACPI_BASE_ADDRESS 0x1000
+#define ACPI_BASE_SIZE 0x100
+
+#define LEGACY_GPIO_BASE_ADDRESS 0x1080
+#define LEGACY_GPIO_SIZE 0x80
+
+#define IO_ADDRESS_VALID 0x80000000
#endif /* _QUARK_IOMAP_H_ */