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authorLee Leahy <leroy.p.leahy@intel.com>2016-02-07 14:55:05 -0800
committerStefan Reinauer <stefan.reinauer@coreboot.org>2016-02-10 03:12:18 +0100
commit89c61b563044aa89a41349a44ce850dfe888689b (patch)
tree07f85ccf29d4ac977325200772f64a83f209ebae /src/soc/intel/quark/include
parentd4edacb2e4803bd06091e3c57a1f087388228529 (diff)
soc/intel/quark: Report CPU info
Decode the CPU variants and display the CPU info. Testing on Galileo: * Edit the src/mainboard/intel/galileo/Makefile.inc file * Add "select ADD_FSP_PDAT_FILE" * Add "select ADD_FSP_RAW_BIN" * Add "select ADD_RMU_FILE" * Place the FSP.bin file in the location specified by CONFIG_FSP_FILE * Place the pdat.bin files in the location specified by CONFIG_FSP_PDAT_FILE * Place the rmu.bin file in the location specified by CONFIG_RMU_FILE * Successful if Quark X1000 is displayed Change-Id: I7234a6d81a48cdd02708b80663147e2b09ba979e Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/13605 Tested-by: build bot (Jenkins) Reviewed-by: FEI WANG <wangfei.jimei@gmail.com>
Diffstat (limited to 'src/soc/intel/quark/include')
-rw-r--r--src/soc/intel/quark/include/soc/cpu.h25
-rw-r--r--src/soc/intel/quark/include/soc/romstage.h1
2 files changed, 26 insertions, 0 deletions
diff --git a/src/soc/intel/quark/include/soc/cpu.h b/src/soc/intel/quark/include/soc/cpu.h
new file mode 100644
index 0000000000..25ba599fc4
--- /dev/null
+++ b/src/soc/intel/quark/include/soc/cpu.h
@@ -0,0 +1,25 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015-2016 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _QUARK_CPU_H_
+#define _BROADWELL_CPU_H_
+
+#include <arch/cpu.h>
+#include <device/device.h>
+
+/* Supported CPUIDs */
+#define CPUID_QUARK_X1000 0X590
+
+#endif /* _QUARK_CPU_H_ */
diff --git a/src/soc/intel/quark/include/soc/romstage.h b/src/soc/intel/quark/include/soc/romstage.h
index 3a1320cafc..23c62704a9 100644
--- a/src/soc/intel/quark/include/soc/romstage.h
+++ b/src/soc/intel/quark/include/soc/romstage.h
@@ -30,6 +30,7 @@ void mcr_write(uint8_t opcode, uint8_t port, uint32_t reg_address);
uint32_t mdr_read(void);
void mdr_write(uint32_t value);
void mea_write(uint32_t reg_address);
+void report_platform_info(void);
int set_base_address_and_enable_uart(u8 bus, u8 dev, u8 func, u32 mmio_base);
#endif /* _QUARK_ROMSTAGE_H_ */