diff options
| author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-02-08 07:12:30 -0800 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2016-02-10 03:12:10 +0100 |
| commit | d4edacb2e4803bd06091e3c57a1f087388228529 (patch) | |
| tree | 29aeb2cd667de9cd9c5dcdbd57135bec0e80ff5b /src/soc/intel/quark/chip.c | |
| parent | 43cdff6b453e0563414a020c2bab69a841a8f2e8 (diff) | |
soc/intel/quark: Call FSP SiliconInit
Optionally relocate FSP into DRAM and then call FSP SiliconInit.
Testing on Galileo:
* Edit the src/mainboard/intel/galileo/Makefile.inc file
* Add "select ADD_FSP_PDAT_FILE"
* Add "select ADD_FSP_RAW_BIN"
* Add "select ADD_RMU_FILE"
* Add "select DISPLAY_FSP_ENTRY_POINTS"
* Add "select DISPLAY_HOBS"
* Optionally add "select RELOCATE_FSP_INTO_DRAM"
* Place the FSP.bin file in the location specified by CONFIG_FSP_FILE
* Place the pdat.bin files in the location specified by
CONFIG_FSP_PDAT_FILE
* Place the rmu.bin file in the location specified by CONFIG_RMU_FILE
* Testing is successful if:
* FSP entry points are displayed and
* The message "FspSiliconInit returned 0x00000000" is displayed and
* The HOBs are displayed correctly and
* The message "ERROR - Missing one or more required FSP HOBs!" is
not displayed
Change-Id: I91e660ea373a8bb00fc97fe8b760347cbfa96b1e
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13631
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/quark/chip.c')
| -rw-r--r-- | src/soc/intel/quark/chip.c | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/src/soc/intel/quark/chip.c b/src/soc/intel/quark/chip.c new file mode 100644 index 0000000000..f14dde0b55 --- /dev/null +++ b/src/soc/intel/quark/chip.c @@ -0,0 +1,33 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * Copyright (C) 2015-2016 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "chip.h" +#include <console/console.h> +#include <fsp/ramstage.h> + +static void soc_init(void *chip_info) +{ + /* Perform silicon specific init. */ + if (IS_ENABLED(CONFIG_RELOCATE_FSP_INTO_DRAM)) + intel_silicon_init(); + else + fsp_run_silicon_init(find_fsp(CONFIG_FSP_ESRAM_LOC), 0); +} + +struct chip_operations soc_intel_quark_ops = { + CHIP_NAME("Intel Quark") + .init = &soc_init, +}; |