diff options
author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-07-31 17:20:30 -0700 |
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committer | Lee Leahy <leroy.p.leahy@intel.com> | 2016-08-05 01:55:17 +0200 |
commit | f74ce24de1c19cd021c9a09765f024a23c1fc238 (patch) | |
tree | e3a2186554fbbab5a8cafc83a1eabd2eee8a5f49 /src/soc/intel/quark/acpi.c | |
parent | d52636113aa2ff7da27f710db9b8a53ac5de6ed2 (diff) |
soc/intel/quark: Clean up debug output levels
Change the debug output levels for quark:
* Remove excess debug output
* Change BIOS_DEBUG to BIOS_SPEW - exception in report_platform.c
TEST=Build and run on Galileo Gen2
Change-Id: I37d7ed21a7fc4c92efeb5b71dd01922d7d4b9192
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/16006
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc/intel/quark/acpi.c')
-rw-r--r-- | src/soc/intel/quark/acpi.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/quark/acpi.c b/src/soc/intel/quark/acpi.c index 90adc344d2..960b53f675 100644 --- a/src/soc/intel/quark/acpi.c +++ b/src/soc/intel/quark/acpi.c @@ -97,9 +97,9 @@ void acpi_fill_in_fadt(acpi_fadt_t *fadt) fadt->x_gpe0_blk.addrh = 0; /* Display the base registers */ - printk(BIOS_DEBUG, "FADT:\n"); - printk(BIOS_DEBUG, " 0x%08x: GPE0_BASE\n", gpe0_base); - printk(BIOS_DEBUG, " 0x%08x: PMBASE\n", pmbase); - printk(BIOS_DEBUG, " 0x%08x: RESET\n", fadt->reset_reg.addrl); + printk(BIOS_SPEW, "FADT:\n"); + printk(BIOS_SPEW, " 0x%08x: GPE0_BASE\n", gpe0_base); + printk(BIOS_SPEW, " 0x%08x: PMBASE\n", pmbase); + printk(BIOS_SPEW, " 0x%08x: RESET\n", fadt->reset_reg.addrl); } |