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authorLee Leahy <leroy.p.leahy@intel.com>2017-05-24 13:23:26 -0700
committerLee Leahy <leroy.p.leahy@intel.com>2017-06-20 18:11:07 +0200
commitd9351099ef5ca58a6153da1b782178bda22bc879 (patch)
tree9ba7393c6a9083d094f5d9c4fc80f61c1316d56e /src/soc/intel/quark/Makefile.inc
parent0cae6e9e5d1be31daf80894dbf5f01880c786bbb (diff)
soc/intel/quark: Add legacy SPI flash controller driver
Add SPI driver code for the legacy SPI flash controller. Enable erase and write support allowing coreboot to save non-volatile data into the SPI flash. TEST=Build and run on Galileo Gen2. Change-Id: I8f38c955d7c42a1e58728c728d0cecc36556de5c Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/20231 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/quark/Makefile.inc')
-rw-r--r--src/soc/intel/quark/Makefile.inc2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/quark/Makefile.inc b/src/soc/intel/quark/Makefile.inc
index d0a7a932e8..741f5d3068 100644
--- a/src/soc/intel/quark/Makefile.inc
+++ b/src/soc/intel/quark/Makefile.inc
@@ -58,6 +58,8 @@ ramstage-y += northcluster.c
ramstage-y += reg_access.c
ramstage-$(CONFIG_PLATFORM_USES_FSP2_0) += reset.c
ramstage-y += sd.c
+ramstage-y += spi.c
+ramstage-y += spi_debug.c
ramstage-$(CONFIG_STORAGE_TEST) += storage_test.c
ramstage-y += tsc_freq.c
ramstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart_common.c