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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-02-21 16:04:53 -0800 |
|---|---|---|
| committer | Leroy P Leahy <leroy.p.leahy@intel.com> | 2016-02-29 04:59:56 +0100 |
| commit | a6de5470fa757f7e9c40d417e7f40551ccdba99c (patch) | |
| tree | af1422cc0a46f0da912cc79c907c94dd127451ee /src/soc/intel/quark/Makefile.inc | |
| parent | 4ee073d4769a966e1da0e61575e1b1f9c6ad820a (diff) | |
soc/intel/quark: Initialize some of the FADT base registers
Initialize the base addresses for:
* Power management control
* Power management status
* Reset
* Power management timer
* General-Purpose Event 0
Testing on Galileo:
* Edit the src/mainboard/intel/galileo/Makefile.inc file:
* Add "select ADD_FSP_PDAT_FILE"
* Add "select ADD_FSP_RAW_BIN"
* Add "select ADD_RMU_FILE"
* Place the FSP.bin file in the location specified by CONFIG_FSP_FILE
* Place the pdat.bin files in the location specified by
CONFIG_FSP_PDAT_FILE
* Place the rmu.bin file in the location specified by CONFIG_RMU_FILE
* Build EDK2 CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc to generate
UEFIPAYLOAD.fd
* Edit .config file and add the following lines:
* CONFIG_PAYLOAD_ELF=y
* CONFIG_PAYLOAD_FILE="path to UEFIPAYLOAD.fd"
* Testing successful when:
* Register address are properly displayed by the payload
* "reset -c" performs a reset and reboots the system
* "reset -w" performs a reset and reboots the system
* "reset -s" performs a reset and turns off the power
Change-Id: I9d043f4906a067b2477650140210cfae4a7f8b79
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13764
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/quark/Makefile.inc')
| -rw-r--r-- | src/soc/intel/quark/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/quark/Makefile.inc b/src/soc/intel/quark/Makefile.inc index c89a97e4c5..d8650fa8b9 100644 --- a/src/soc/intel/quark/Makefile.inc +++ b/src/soc/intel/quark/Makefile.inc @@ -26,6 +26,7 @@ ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c ramstage-y += chip.c ramstage-y += memmap.c ramstage-y += northcluster.c +ramstage-y += pmc.c ramstage-y += tsc_freq.c ramstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart_common.c ramstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart.c |