diff options
| author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-05-30 15:01:06 -0700 |
|---|---|---|
| committer | Leroy P Leahy <leroy.p.leahy@intel.com> | 2016-05-31 22:11:51 +0200 |
| commit | bc518d5cab4234a0d0d06a7d3829bbca9e318ba6 (patch) | |
| tree | 09eb5cf6c3476c17ca34fde7164d14c2f2ec3b0b /src/soc/intel/quark/Kconfig | |
| parent | ac78db3a53a7653a73409936455d68c754291e9d (diff) | |
quark: Enable HSUART0 as console
The use of HSUART0 on galileo requires early initialization of the I2C
GPIO expanders to direct the RXD and TXD signals to DIGITAL 0 and 1
on the expansion connector.
TEST=None
Change-Id: I11195d79e954c1f6bc91eafe257d7ddc1310b2e7
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15010
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/quark/Kconfig')
| -rw-r--r-- | src/soc/intel/quark/Kconfig | 27 |
1 files changed, 19 insertions, 8 deletions
diff --git a/src/soc/intel/quark/Kconfig b/src/soc/intel/quark/Kconfig index 6a2349fb8d..2c7ec641b6 100644 --- a/src/soc/intel/quark/Kconfig +++ b/src/soc/intel/quark/Kconfig @@ -40,9 +40,19 @@ config CPU_SPECIFIC_OPTIONS # The following options configure the debug serial port ##### +config ENABLE_BUILTIN_HSUART0 + bool "Enable built-in HSUART0" + default n + select NO_UART_ON_SUPERIO + select DRIVERS_UART_8250MEM_32 + help + The Quark SoC has two HSUART. Choose this option to configure the pads + and enable HSUART0, which can be used for the debug console. + config ENABLE_BUILTIN_HSUART1 bool "Enable built-in HSUART1" - default y + default n + depends on ! ENABLE_BUILTIN_HSUART0 select NO_UART_ON_SUPERIO select DRIVERS_UART_8250MEM_32 help @@ -50,23 +60,24 @@ config ENABLE_BUILTIN_HSUART1 and enable HSUART1, which can be used for the debug console. config TTYS0_BASE - hex "HSUART1 Base Address" - depends on ENABLE_BUILTIN_HSUART1 + hex "HSUART Base Address" default 0xA0019000 + depends on ENABLE_BUILTIN_HSUART0 || ENABLE_BUILTIN_HSUART1 help - Memory mapped MMIO of HSUART1. + Memory mapped MMIO of HSUART. config TTYS0_LCS int - depends on ENABLE_BUILTIN_HSUART1 default 3 + depends on ENABLE_BUILTIN_HSUART0 || ENABLE_BUILTIN_HSUART1 -# Console: PCI UART bus 0 << 20, device 20 << 15, function 5 << 12 +# Console: PCI UART bus 0 << 20, device 20 << 15, function x << 12 # Valid bit, PCI UART in use: 1 << 31 config UART_PCI_ADDR hex - depends on ENABLE_BUILTIN_HSUART1 - default 0x800a5000 + default 0x800a1000 if ENABLE_BUILTIN_HSUART0 + default 0x800a5000 if ENABLE_BUILTIN_HSUART1 + depends on ENABLE_BUILTIN_HSUART0 || ENABLE_BUILTIN_HSUART1 ##### # Debug support |