diff options
author | Elyes Haouas <ehaouas@noos.fr> | 2023-09-09 08:51:22 +0200 |
---|---|---|
committer | Felix Singer <service+coreboot-gerrit@felixsinger.de> | 2023-09-15 01:08:25 +0000 |
commit | 244a60ea4429da58ce371de46169b2dfd0f2654c (patch) | |
tree | 205182fefe20759e434eeb7c92b31e289dbaa4f5 /src/soc/intel/meteorlake | |
parent | 37833fc4be8a67aedd6e806d3addd706cc1db57b (diff) |
soc/intel/meteorlake: Remove space after a cast
Change-Id: Ibf28fbdf791e7aa2faa41f3059150bf5ff5d21d1
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77735
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/meteorlake')
-rw-r--r-- | src/soc/intel/meteorlake/crashlog.c | 8 | ||||
-rw-r--r-- | src/soc/intel/meteorlake/fsp_params.c | 2 |
2 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/intel/meteorlake/crashlog.c b/src/soc/intel/meteorlake/crashlog.c index cf05b24613..f15bd3d5c3 100644 --- a/src/soc/intel/meteorlake/crashlog.c +++ b/src/soc/intel/meteorlake/crashlog.c @@ -105,7 +105,7 @@ void cl_get_pmc_sram_data(void) /* allocate memory for the PMC crash records to be copied */ unsigned long pmc_cl_cbmem_addr; - pmc_cl_cbmem_addr = (unsigned long) cbmem_add(CBMEM_ID_PMC_CRASHLOG, + pmc_cl_cbmem_addr = (unsigned long)cbmem_add(CBMEM_ID_PMC_CRASHLOG, pmc_crashLog_size); if (!pmc_cl_cbmem_addr) { printk(BIOS_ERR, "Unable to allocate CBMEM PMC crashLog entry.\n"); @@ -113,7 +113,7 @@ void cl_get_pmc_sram_data(void) } memset((void *)pmc_cl_cbmem_addr, 0, pmc_crashLog_size); - soc_pmc_dest = (u32 *)(uintptr_t) pmc_cl_cbmem_addr; + soc_pmc_dest = (u32 *)(uintptr_t)pmc_cl_cbmem_addr; bool pmc_sram = true; @@ -179,7 +179,7 @@ void cl_get_pmc_sram_data(void) /* allocate memory for the IOE crashlog records to be copied */ unsigned long ioe_cl_cbmem_addr; - ioe_cl_cbmem_addr = (unsigned long) cbmem_add(CBMEM_ID_IOE_CRASHLOG, + ioe_cl_cbmem_addr = (unsigned long)cbmem_add(CBMEM_ID_IOE_CRASHLOG, ioe_crashLog_size); if (!ioe_cl_cbmem_addr) { printk(BIOS_ERR, "Unable to allocate CBMEM IOE crashLog entry.\n"); @@ -187,7 +187,7 @@ void cl_get_pmc_sram_data(void) } memset((void *)ioe_cl_cbmem_addr, 0, ioe_crashLog_size); - ioe_pmc_dest = (u32 *)(uintptr_t) ioe_cl_cbmem_addr; + ioe_pmc_dest = (u32 *)(uintptr_t)ioe_cl_cbmem_addr; /* process crashlog records for IOE SRAM */ for (int i = 0; i < descriptor_table.numb_regions + 1; i++) { diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c index 17d7ad0fc1..5350783b00 100644 --- a/src/soc/intel/meteorlake/fsp_params.c +++ b/src/soc/intel/meteorlake/fsp_params.c @@ -393,7 +393,7 @@ static void fill_fsps_cpu_params(FSP_S_CONFIG *s_cfg, * This would avoid APs from getting hijacked by FSP while coreboot * decides to set SkipMpInit UPD. */ - s_cfg->CpuMpPpi = (uintptr_t) mp_fill_ppi_services_data(); + s_cfg->CpuMpPpi = (uintptr_t)mp_fill_ppi_services_data(); /* * Fill `2nd microcode loading FSP UPD` if FSP is running CPU feature |