summaryrefslogtreecommitdiff
path: root/src/soc/intel/jasperlake
diff options
context:
space:
mode:
authorSubrata Banik <subratabanik@google.com>2022-11-24 21:02:00 +0530
committerSubrata Banik <subratabanik@google.com>2022-12-02 07:51:36 +0000
commitbed82b0c40b62736323a26a36a114b39c3c77a45 (patch)
tree606ed766241448b43b86ac2a31d16cacbb1d7aad /src/soc/intel/jasperlake
parent52191f21237c52ced62daaa61f7e0aa252bf7e07 (diff)
soc/intel/cmn/cse: Create another config for sending CSE EOP cmd late
Presently, coreboot supports two instances of sending EOP cmd to the Intel CSE. 1. Sending EOP cmd to CSE during `.final` operation from cse pci driver. 2. Starting with Alder Lake, the recommendation was to send EOP to CSE earlier than CSE `.final` operation. Since then it's referred to as `Sending EOP Early`. This method helped to save the CSE EOP response time significantly. During Meteor Lake platform, CSE EOP response time has become non-deterministic and we have figured that sending EOP command later than CSE .final operation is actually helping to optimize the boot time significantly (around ~150ms savings compared to sending from `.final` ops and ~5sec compared to sending CSE early). Hence, this patch intended to create yet another kconfig for sending CSE late (specifically after `.final` operation). The idea for this newer config is to use the boot state machine for sending CSE EOP cmd. The patch train in this series would add the specific changes to allow sending EOP late and perform other essential operations required prior booting to OS as coreboot decided to skip calling into FSP Notify phase. Starting with Jasper Lake, coreboot sends EOP before loading payload hence, this config is applicable for those platforms. The current plan is that Intel Jasper Lake, Tiger Lake and Meteor Lake platform will select this newer config from SoC code. BUG=b:260041679 TEST=Able to send EOP command successfully for Google/Taeko. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: Iea512cd5b79d61dd5d5a962079baf525027c831f Reviewed-on: https://review.coreboot.org/c/coreboot/+/69976 Reviewed-by: Kapil Porwal <kapilporwal@google.com> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/jasperlake')
-rw-r--r--src/soc/intel/jasperlake/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig
index e7b486be04..183657445d 100644
--- a/src/soc/intel/jasperlake/Kconfig
+++ b/src/soc/intel/jasperlake/Kconfig
@@ -60,6 +60,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_FSP_RESET
select SOC_INTEL_COMMON_PCH_CLIENT
select SOC_INTEL_COMMON_RESET
+ select SOC_INTEL_CSE_SEND_EOP_LATE
select SOC_INTEL_CSE_SET_EOP
select SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION
select SSE2