summaryrefslogtreecommitdiff
path: root/src/soc/intel/jasperlake
diff options
context:
space:
mode:
authorRonak Kanabar <ronak.kanabar@intel.com>2020-10-01 18:03:09 +0530
committerPatrick Georgi <pgeorgi@google.com>2020-11-02 06:25:53 +0000
commit8586b4020d8f8c95f8a88d877a8220be94086395 (patch)
tree8eb1b7c4b6381065b2e33aaef78f067bebf655f6 /src/soc/intel/jasperlake
parent77a23d10bfbc928812bbe6ba5426ca461a64ff26 (diff)
soc/intel/jasperlake: Set the GpioOverride configuration
Set "GpioOverride" config to override FSP gpio configuration. FSP will not configure any GPIOs and rely on GPIO settings programmed before moved to FSP. BUG=b:150666058 TEST=Build and boot JSLRVP Cq-Depend: TBD Change-Id: Ia4036cf0be3a6036d70920743958dc327a652077 Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45901 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/jasperlake')
-rw-r--r--src/soc/intel/jasperlake/romstage/fsp_params.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/intel/jasperlake/romstage/fsp_params.c b/src/soc/intel/jasperlake/romstage/fsp_params.c
index dccdebf304..528ef0fd21 100644
--- a/src/soc/intel/jasperlake/romstage/fsp_params.c
+++ b/src/soc/intel/jasperlake/romstage/fsp_params.c
@@ -116,6 +116,13 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
/* Skip the CPU replacement check */
m_cfg->SkipCpuReplacementCheck = config->SkipCpuReplacementCheck;
+
+ /*
+ * Set GpioOverride
+ * When GpioOverride is set FSP will not configure any GPIOs
+ * and rely on GPIO settings programmed before moved to FSP.
+ */
+ m_cfg->GpioOverride = 1;
}
void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)