aboutsummaryrefslogtreecommitdiff
path: root/src/soc/intel/jasperlake
diff options
context:
space:
mode:
authorFurquan Shaikh <furquan@google.com>2020-11-02 14:00:35 -0800
committerKarthik Ramasubramanian <kramasub@google.com>2020-11-03 23:58:45 +0000
commit7c36dc12df01ed168169b9abcb374d570cf458af (patch)
tree50ceb02b2d59573b9cb088f4bf2c2909ff0a46ac /src/soc/intel/jasperlake
parent1b85692fc4247659a188cba577ba8c35aa373fbd (diff)
soc/intel/{tgl,jsl}: Enable logging of wake sources for S0ix
This change adds elog.c to smm-y for Tiger lake and Jasper Lake platforms to enable the logging of wake sources in eventlog for S0ix. BUG=b:172272078,b:169731044 BRANCH=volteer TEST=Verified on volteer that wake sources are correctly logged for S0ix: 8 | 2020-11-02 13:54:27 | S0ix Enter 9 | 2020-11-02 13:54:33 | S0ix Exit 10 | 2020-11-02 13:54:33 | Wake Source | RTC Alarm | 0 11 | 2020-11-02 13:54:49 | S0ix Enter 12 | 2020-11-02 13:54:54 | S0ix Exit 13 | 2020-11-02 13:54:54 | Wake Source | Power Button | 0 14 | 2020-11-02 13:55:04 | S0ix Enter 15 | 2020-11-02 13:55:10 | S0ix Exit 16 | 2020-11-02 13:55:10 | Wake Source | GPE # | 112 Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: Ie1c40dfba6c82ca45a21d35c5a2725e4d30855d6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/47141 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/jasperlake')
-rw-r--r--src/soc/intel/jasperlake/Makefile.inc1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/jasperlake/Makefile.inc b/src/soc/intel/jasperlake/Makefile.inc
index 1cba218700..209d8a2661 100644
--- a/src/soc/intel/jasperlake/Makefile.inc
+++ b/src/soc/intel/jasperlake/Makefile.inc
@@ -51,6 +51,7 @@ smm-y += pmc.c
smm-y += pmutil.c
smm-y += smihandler.c
smm-y += uart.c
+smm-y += elog.c
verstage-y += gpio.c