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authorChia-Ling Hou <chia-ling.hou@intel.com>2023-05-15 17:31:57 +0800
committerLean Sheng Tan <sheng.tan@9elements.com>2023-05-19 10:16:36 +0000
commit141d0dfafb211185f97460cf5d5e5f3e81f06c3d (patch)
treeca1a9a85e235cc581d5871d91cb92b20bb6cfd56 /src/soc/intel/jasperlake
parentede5564b3e3ee082c93f915a902d98d064a11950 (diff)
soc/intel/jasperlake: Add PsysPmax config
Enable PSYS capability. PSYS is required to safeguard the system stability if no charger IC. BUG=b:281479111 TEST=emerge-dedede coreboot chromeos-bootimage & ensure the value is passed to FSP by enabling FSP log & Boot into the OS Change-Id: Ibe54acaf80700252558b82f194b9536b6117b84e Signed-off-by: Chia-Ling Hou <chia-ling.hou@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75196 Reviewed-by: Reka Norman <rekanorman@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/jasperlake')
-rw-r--r--src/soc/intel/jasperlake/chip.h3
-rw-r--r--src/soc/intel/jasperlake/fsp_params.c7
2 files changed, 10 insertions, 0 deletions
diff --git a/src/soc/intel/jasperlake/chip.h b/src/soc/intel/jasperlake/chip.h
index 3e47e00a63..e6b8f6805e 100644
--- a/src/soc/intel/jasperlake/chip.h
+++ b/src/soc/intel/jasperlake/chip.h
@@ -419,6 +419,9 @@ struct soc_intel_jasperlake_config {
CD_CLOCK_556_8_MHZ = 7,
} cd_clock;
+ /* Platform Power Pmax */
+ uint16_t PsysPmax;
+
/*
* This is a workaround to mitigate higher SoC power consumption in S0ix
* when the CNVI has background activity.
diff --git a/src/soc/intel/jasperlake/fsp_params.c b/src/soc/intel/jasperlake/fsp_params.c
index 09be260111..1e6731d91c 100644
--- a/src/soc/intel/jasperlake/fsp_params.c
+++ b/src/soc/intel/jasperlake/fsp_params.c
@@ -188,6 +188,13 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
config->PchPmSlpS3MinAssert, config->PchPmSlpAMinAssert,
config->PchPmPwrCycDur);
+ /* Set PsysPmax */
+ if (config->PsysPmax) {
+ printk(BIOS_DEBUG, "PsysPmax = %dW\n", config->PsysPmax);
+ /* PsysPmax is in unit of 1/8 Watt */
+ params->PsysPmax = config->PsysPmax * 8;
+ }
+
/*
* Fill Acoustic noise mitigation related configuration
* JSL only has single VR domain (VCCIN VR), thus filling only index 0 for