soc/intel/jasperlake: Add Acoustic noise mitigation configuration

This patch exposes acoustic noise mitigation related UPDs/configuration
to be filled from devicetree.
For each variant, we might have different values for various parameters.
Filling it from devicetree will allow us to fill separate values for
each board/variant.

Note that since JasperLake only has one VR, we're only filling index 0
for slew rate and FastPkgCRampDisable.

BUG=b:162192346
BRANCH=dedede
TEST=code compilation is successful and values from devicetree are
getting reflected in UPDs

Change-Id: Id022f32acc3fd3fe62f78e3053bacdeb33727c02
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47879
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>

2 files changed, 53 insertions, 0 deletions

diff --git a/src/soc/intel/jasperlake/chip.h b/src/soc/intel/jasperlake/chip.h
index 0ed42050e9..2fc32c9840 100644
--- a/src/soc/intel/jasperlake/chip.h
+++ b/src/soc/intel/jasperlake/chip.h
@@ -359,6 +359,51 @@ struct soc_intel_jasperlake_config {
 	 * Range: 0.0% to 10.0% (0-100)
 	 */
 	uint8_t FivrSpreadSpectrum;
+
+	/*
+	 * Disable Fast Slew Rate for Deep Package C States for VR domains
+	 * Disable Fast Slew Rate for Deep Package C States based on
+	 * Acoustic Noise Mitigation feature enabled.
+	 */
+	uint8_t FastPkgCRampDisable;
+
+	/*
+	 * Slew Rate configuration for Deep Package C States for VR domains
+	 * based on Acoustic Noise Mitigation feature enabled.
+	 * 0: Fast/2 ; 1: Fast/4; 2: Fast/8; 3: Fast/16
+	 */
+	uint8_t SlowSlewRate;
+
+	/*
+	 * Enable or Disable Acoustic Noise Mitigation feature.
+	 * 0: Disabled ; 1: Enabled
+	 */
+	uint8_t AcousticNoiseMitigation;
+
+	/*
+	 * Acoustic Noise Mitigation Range.Defines the maximum Pre-Wake
+	 * randomization time in micro ticks.This can be programmed only
+	 * if AcousticNoiseMitigation is enabled.
+	 * Range 0-255
+	 */
+	uint8_t PreWake;
+
+	/*
+	 * Acoustic Noise Mitigation Range.Defines the maximum Ramp Up
+	 * randomization time in micro ticks.This can be programmed only
+	 * if AcousticNoiseMitigation is enabled.
+	 * Range 0-255
+	 */
+	uint8_t RampUp;
+
+	/*
+	 * Acoustic Noise Mitigation Range.Defines the maximum Ramp Down
+	 * randomization time in micro ticks.This can be programmed only
+	 * if AcousticNoiseMitigation is enabled.
+	 * Range 0-255
+	 */
+	uint8_t RampDown;
+
 };
 
 typedef struct soc_intel_jasperlake_config config_t;
diff --git a/src/soc/intel/jasperlake/fsp_params.c b/src/soc/intel/jasperlake/fsp_params.c
index 92c35c62dc..c03e9dd15b 100644
--- a/src/soc/intel/jasperlake/fsp_params.c
+++ b/src/soc/intel/jasperlake/fsp_params.c
@@ -236,6 +236,14 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
 				config->PchPmSlpS3MinAssert, config->PchPmSlpAMinAssert,
 				config->PchPmPwrCycDur);
 
+	/* Fill Acoustic noise mitigation related configuration */
+	params->FastPkgCRampDisable[0] = config->FastPkgCRampDisable;
+	params->SlowSlewRate[0] = config->SlowSlewRate;
+	params->AcousticNoiseMitigation = config->AcousticNoiseMitigation;
+	params->PreWake = config->PreWake;
+	params->RampUp = config->RampUp;
+	params->RampDown = config->RampDown;
+
 	/* Override/Fill FSP Silicon Param for mainboard */
 	mainboard_silicon_init_params(params);
 }