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authorFurquan Shaikh <furquan@google.com>2020-05-29 08:56:58 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-06-06 09:28:17 +0000
commit5ce3bca1e7e769df7941d818dcc65484ad1b2b53 (patch)
tree615ad9eca41eceb601bc200c63b3428a4ce6845a /src/soc/intel/jasperlake
parent4bd95295f1147cf548756d4d05f48df402f5877e (diff)
soc/intel/tigerlake: Generate LP4x SPD files using gen_spd.go
This change uses gen_spd.go and global_lp4x_mem_parts.json.txt to generate SPD files for currently known LP4x memory parts that can be used with TGL-based mainboards. Following files are added: 1. spd-*.hex: SPD files auto-generated by gen_spd.go 2. spd_manifest.generated.txt: Manifest file auto-generated by gen_spd.go Mainboards can use the SPD files from SoC directly when creating SPD binary to add to CBFS. BUG=b:147321551,b:155239397 Change-Id: Ic3935e4f6d106cbdf496fdfa28a0991e2d238fd9 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41875 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
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