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author | Felix Held <felix-coreboot@felixheld.de> | 2023-07-13 18:34:11 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2023-07-14 16:49:55 +0000 |
commit | 2e9a396ffbde4491ee4b4a97d92b740dfc541eae (patch) | |
tree | 63117e48d64c7a80f13898a4fee7e2488871ffad /src/soc/intel/jasperlake/p2sb.c | |
parent | d1c33aeef4f8effbaacc54be99f9b7c5dd9fbcc5 (diff) |
vc/amd/fsp/glinda/platform_descriptors: add dxio_port_param_type TODO
The dxio_port_param_type enum was copied over from Cezanne, but the enum
on the AGESA/FSP side changed between the generations. Add a TODO as a
reminder that this needs to be updated.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I8063ab00a508b045265bab73197c8ca117622800
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76448
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/jasperlake/p2sb.c')
0 files changed, 0 insertions, 0 deletions