soc/intel/jasperlake: Add function to display ME firmware status info

Add function to display ME Host Firmware Status registers. Make use of
print_me_fw_version() from CSE lib to print ME firmware version information.

Add manufacturing mode field in HFSTS1 register for JSL in place of,
spi_protection_mode in TGL.

BUG=None
BRANCH=None
TEST=Build and boot jslrvp. In coreboot logs, ME info can be seen.
ME: Version: 13.5.0.7049
ME: HFSTS1                  : 0x90006255
ME: HFSTS2                  : 0x82100136
ME: HFSTS3                  : 0x00000020
ME: HFSTS4                  : 0x00004800
ME: HFSTS5                  : 0x00000000
ME: HFSTS6                  : 0x00400006
ME: Manufacturing Mode      : YES
ME: FW Partition Table      : OK
ME: Bringup Loader Failure  : NO
ME: Firmware Init Complete  : YES
ME: Boot Options Present    : NO
ME: Update In Progress      : NO
ME: D0i3 Support            : YES
ME: Low Power State Enabled : NO
ME: CPU Replaced            : YES
ME: CPU Replacement Valid   : YES
ME: Current Working State   : 5
ME: Current Operation State : 1
ME: Current Operation Mode  : 0
ME: Error Code              : 6
ME: CPU Debug Disabled      : YES
ME: TXT Support             : NO

Change-Id: Ic6b1c9410db8f06ac24fd997772b2ede04264bee
Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40570
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>

1 files changed, 106 insertions, 26 deletions

diff --git a/src/soc/intel/jasperlake/include/soc/me.h b/src/soc/intel/jasperlake/include/soc/me.h
index a4ede83903..73196905f8 100644
--- a/src/soc/intel/jasperlake/include/soc/me.h
+++ b/src/soc/intel/jasperlake/include/soc/me.h
@@ -5,39 +5,119 @@
 
 /* ME Host Firmware Status register 1 */
 union me_hfsts1 {
-	u32 data;
+	uint32_t data;
 	struct {
-		u32 working_state: 4;
-		u32 spi_protection_mode: 1;
-		u32 fpt_bad: 1;
-		u32 operation_state: 3;
-		u32 fw_init_complete: 1;
-		u32 ft_bup_ld_flr: 1;
-		u32 update_in_progress: 1;
-		u32 error_code: 4;
-		u32 operation_mode: 4;
-		u32 reset_count: 4;
-		u32 boot_options_present: 1;
-		u32 invoke_enhance_dbg_mode: 1;
-		u32 bist_test_state: 1;
-		u32 bist_reset_request: 1;
-		u32 current_power_source: 2;
-		u32 reserved: 1;
-		u32 d0i3_support_valid: 1;
+		uint32_t working_state: 4;
+		uint32_t mfg_mode: 1;
+		uint32_t fpt_bad: 1;
+		uint32_t operation_state: 3;
+		uint32_t fw_init_complete: 1;
+		uint32_t ft_bup_ld_flr: 1;
+		uint32_t update_in_progress: 1;
+		uint32_t error_code: 4;
+		uint32_t operation_mode: 4;
+		uint32_t reset_count: 4;
+		uint32_t boot_options_present: 1;
+		uint32_t reserved1: 1;
+		uint32_t bist_test_state: 1;
+		uint32_t bist_reset_request: 1;
+		uint32_t current_power_source: 2;
+		uint32_t reserved: 1;
+		uint32_t d0i3_support_valid: 1;
+	} __packed fields;
+};
+
+/* Host Firmware Status Register 2 */
+union me_hfsts2 {
+	uint32_t data;
+	struct {
+		uint32_t nftp_load_failure	: 1;
+		uint32_t icc_prog_status	: 2;
+		uint32_t invoke_mebx		: 1;
+		uint32_t cpu_replaced		: 1;
+		uint32_t rsvd0			: 1;
+		uint32_t mfs_failure		: 1;
+		uint32_t warm_reset_rqst	: 1;
+		uint32_t cpu_replaced_valid	: 1;
+		uint32_t low_power_state	: 1;
+		uint32_t me_power_gate		: 1;
+		uint32_t ipu_needed		: 1;
+		uint32_t forced_safe_boot	: 1;
+		uint32_t rsvd1			: 2;
+		uint32_t listener_change	: 1;
+		uint32_t status_data		: 8;
+		uint32_t current_pmevent	: 4;
+		uint32_t phase			: 4;
 	} __packed fields;
 };
 
 /* ME Host Firmware Status Register 3 */
 union me_hfsts3 {
-	u32 data;
+	uint32_t data;
+	struct {
+		uint32_t reserved_0: 4;
+		uint32_t fw_sku: 3;
+		uint32_t reserved: 25;
+	} __packed fields;
+};
+
+/* Host Firmware Status Register 4 */
+union me_hfsts4 {
+	uint32_t data;
+	struct {
+		uint32_t rsvd0			: 9;
+		uint32_t enforcement_flow	: 1;
+		uint32_t sx_resume_type		: 1;
+		uint32_t rsvd1			: 1;
+		uint32_t tpms_disconnected	: 1;
+		uint32_t rvsd2			: 1;
+		uint32_t fwsts_valid		: 1;
+		uint32_t boot_guard_self_test	: 1;
+		uint32_t rsvd3			: 16;
+	} __packed fields;
+};
+
+/* Host Firmware Status Register 5 */
+union me_hfsts5 {
+	uint32_t data;
+	struct {
+		uint32_t acm_active		: 1;
+		uint32_t valid			: 1;
+		uint32_t result_code_source	: 1;
+		uint32_t error_status_code	: 5;
+		uint32_t acm_done_sts		: 1;
+		uint32_t timeout_count		: 7;
+		uint32_t scrtm_indicator	: 1;
+		uint32_t inc_boot_guard_acm	: 4;
+		uint32_t inc_key_manifest	: 4;
+		uint32_t inc_boot_policy	: 4;
+		uint32_t rsvd0			: 2;
+		uint32_t start_enforcement	: 1;
+	} __packed fields;
+};
+
+/* Host Firmware Status Register 6 */
+union me_hfsts6 {
+	uint32_t data;
 	struct {
-		u32 reserved_0: 4;
-		u32 fw_sku: 3;
-		u32 reserved_7: 2;
-		u32 reserved_9: 2;
-		u32 resered_11: 3;
-		u32 resered_14: 16;
-		u32 reserved_30: 2;
+		uint32_t force_boot_guard_acm	: 1;
+		uint32_t cpu_debug_disable	: 1;
+		uint32_t bsp_init_disable	: 1;
+		uint32_t protect_bios_env	: 1;
+		uint32_t rsvd0			: 2;
+		uint32_t error_enforce_policy	: 2;
+		uint32_t measured_boot		: 1;
+		uint32_t verified_boot		: 1;
+		uint32_t boot_guard_acmsvn	: 4;
+		uint32_t kmsvn			: 4;
+		uint32_t bpmsvn			: 4;
+		uint32_t key_manifest_id	: 4;
+		uint32_t boot_policy_status	: 1;
+		uint32_t error			: 1;
+		uint32_t boot_guard_disable	: 1;
+		uint32_t fpf_disable		: 1;
+		uint32_t fpf_soc_lock		: 1;
+		uint32_t txt_support		: 1;
 	} __packed fields;
 };
 #endif /* _JASPERLAKE_ME_H_ */