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| author | Felix Held <felix-coreboot@felixheld.de> | 2021-11-09 00:55:38 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-01-12 00:44:50 +0000 |
| commit | caa83ab2e1740ef3f47461d35307f1cb2b5acf78 (patch) | |
| tree | a789fb5adefc0307eb84f46c076928b353ba8fd7 /src/soc/intel/jasperlake/espi.c | |
| parent | 27b02c2eee68f4b6c8520c4737224aaaf81f137d (diff) | |
soc/amd/common/block: add new PCI IDs to common code
The existing common AMD SoC code supports some of AMD Family 17h Model
A0h SoC's PCI devices that however have different PCI IDs. Add the new
PCI ID defines to the PCI ID lists of the common PCI drivers.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I50960e502c63a2ffcfed35178c5e7c9729ef061e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60985
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/intel/jasperlake/espi.c')
0 files changed, 0 insertions, 0 deletions