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authorUsha P <usha.p@intel.com>2020-07-15 14:14:36 +0530
committerPatrick Georgi <pgeorgi@google.com>2020-07-26 21:24:32 +0000
commit253b7d22fe9fea679ccbafd4d55142088e203127 (patch)
tree7a5a4ed76aa98ec7ff61590325b4994fa060446b /src/soc/intel/jasperlake/bootblock
parent6217a15674eb73a3c453d8b1de40bc4e7ea3c90a (diff)
soc/intel/jasperlakelake: Rename pch_init() code
Rename the pch_init function to bootblock_pch_init and romstage_pch_init according to the stage it is defined in. TEST=Able to build and boot Waddledoo successfully. Signed-off-by: Usha P <usha.p@intel.com> Change-Id: Iaa0a41f3b5972251d6cd9359bbb46d392196b2e2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43479 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/jasperlake/bootblock')
-rw-r--r--src/soc/intel/jasperlake/bootblock/bootblock.c2
-rw-r--r--src/soc/intel/jasperlake/bootblock/pch.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/jasperlake/bootblock/bootblock.c b/src/soc/intel/jasperlake/bootblock/bootblock.c
index e7d97c50bf..96e6268f74 100644
--- a/src/soc/intel/jasperlake/bootblock/bootblock.c
+++ b/src/soc/intel/jasperlake/bootblock/bootblock.c
@@ -25,7 +25,7 @@ void bootblock_soc_early_init(void)
void bootblock_soc_init(void)
{
report_platform_info();
- pch_init();
+ bootblock_pch_init();
/* Programming TCO_BASE_ADDRESS and TCO Timer Halt */
tco_configure();
diff --git a/src/soc/intel/jasperlake/bootblock/pch.c b/src/soc/intel/jasperlake/bootblock/pch.c
index f73c57b65e..1260bc8c07 100644
--- a/src/soc/intel/jasperlake/bootblock/pch.c
+++ b/src/soc/intel/jasperlake/bootblock/pch.c
@@ -142,7 +142,7 @@ void pch_early_iorange_init(void)
pch_enable_lpc();
}
-void pch_init(void)
+void bootblock_pch_init(void)
{
/*
* Enabling ABASE for accessing PM1_STS, PM1_EN, PM1_CNT,