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authorTim Wawrzynczak <twawrzynczak@chromium.org>2021-07-01 08:44:14 -0600
committerTim Wawrzynczak <twawrzynczak@chromium.org>2021-09-10 21:57:35 +0000
commit77b36abcf6436734f74a40218b83fd82181ffb78 (patch)
tree6e6f0fc7ec4da9f30734a21c08fe911f24b7093f /src/soc/intel/jasperlake/acpi
parent6d44437ec1310ba7f896275d1b416eb35de467a9 (diff)
soc/intel/jasperlake: Switch to runtime generation of Intel Power Engine
The pep.asl file is being obsoleted by runtime generation, therefore switch jasperlake boards to this method. soc/intel/jasperlake: Switch to acpigen PEPD Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: Ib7f17f9b3b1396708ba68fa7a6d199d6e8b0ba11 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56011 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/soc/intel/jasperlake/acpi')
-rw-r--r--src/soc/intel/jasperlake/acpi/southbridge.asl3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/soc/intel/jasperlake/acpi/southbridge.asl b/src/soc/intel/jasperlake/acpi/southbridge.asl
index e623cc35a9..93e538edc3 100644
--- a/src/soc/intel/jasperlake/acpi/southbridge.asl
+++ b/src/soc/intel/jasperlake/acpi/southbridge.asl
@@ -44,9 +44,6 @@
/* PCI _OSC */
#include <soc/intel/common/acpi/pci_osc.asl>
-/* Intel Power Engine Plug-in */
-#include <soc/intel/common/block/acpi/acpi/pep.asl>
-
/* EMMC/SD card */
#include "scs.asl"