diff options
| author | Aamir Bohra <aamir.bohra@intel.com> | 2020-03-25 13:20:34 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-03-28 14:08:23 +0000 |
| commit | 512b77abb582e6c2566d3873b273dd32731e7bae (patch) | |
| tree | 8807f78791588d361bd1cef00e11f6619203c713 /src/soc/intel/jasperlake/acpi/xhci_tgl.asl | |
| parent | dd7acaad27e4f99f025df7f06d71dbb49d0e399b (diff) | |
soc/intel/jasperlake: Remove Tiger Lake SoC code from Jasper Lake
This is a follow-up patch to initial copy patch for Jasper Lake SoC.
Remove all Tiger Lake specfic code from Jasper Lake SoC code.
BUG=b:150217037
Change-Id: I44dc6bf55ca18a3f0c350f5c3e9fae2996958648
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39824
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/jasperlake/acpi/xhci_tgl.asl')
| -rw-r--r-- | src/soc/intel/jasperlake/acpi/xhci_tgl.asl | 62 |
1 files changed, 0 insertions, 62 deletions
diff --git a/src/soc/intel/jasperlake/acpi/xhci_tgl.asl b/src/soc/intel/jasperlake/acpi/xhci_tgl.asl deleted file mode 100644 index b97f52052b..0000000000 --- a/src/soc/intel/jasperlake/acpi/xhci_tgl.asl +++ /dev/null @@ -1,62 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <soc/gpe.h> - -/* XHCI Controller 0:14.0 */ - -Device (XHCI) -{ - Name (_ADR, 0x00140000) - - Name (_PRW, Package () { GPE0_PME_B0, 3 }) - - Name (_S3D, 3) /* D3 supported in S3 */ - Name (_S0W, 3) /* D3 can wake device in S0 */ - Name (_S3W, 3) /* D3 can wake system from S3 */ - - Method (_PS0, 0, Serialized) - { - - } - - Method (_PS3, 0, Serialized) - { - - } - - /* Root Hub for Tigerlake-LP PCH */ - Device (RHUB) - { - Name (_ADR, Zero) - - /* USB2 */ - Device (HS01) { Name (_ADR, 1) } - Device (HS02) { Name (_ADR, 2) } - Device (HS03) { Name (_ADR, 3) } - Device (HS04) { Name (_ADR, 4) } - Device (HS05) { Name (_ADR, 5) } - Device (HS06) { Name (_ADR, 6) } - Device (HS07) { Name (_ADR, 7) } - Device (HS08) { Name (_ADR, 8) } - Device (HS09) { Name (_ADR, 9) } - Device (HS10) { Name (_ADR, 10) } - - /* USB3 */ - Device (SS01) { Name (_ADR, 13) } - Device (SS02) { Name (_ADR, 14) } - Device (SS03) { Name (_ADR, 15) } - Device (SS04) { Name (_ADR, 16) } - } -} |