diff options
| author | Aamir Bohra <aamir.bohra@intel.com> | 2020-03-25 13:20:34 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-03-28 14:08:23 +0000 |
| commit | 512b77abb582e6c2566d3873b273dd32731e7bae (patch) | |
| tree | 8807f78791588d361bd1cef00e11f6619203c713 /src/soc/intel/jasperlake/Makefile.inc | |
| parent | dd7acaad27e4f99f025df7f06d71dbb49d0e399b (diff) | |
soc/intel/jasperlake: Remove Tiger Lake SoC code from Jasper Lake
This is a follow-up patch to initial copy patch for Jasper Lake SoC.
Remove all Tiger Lake specfic code from Jasper Lake SoC code.
BUG=b:150217037
Change-Id: I44dc6bf55ca18a3f0c350f5c3e9fae2996958648
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39824
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/jasperlake/Makefile.inc')
| -rw-r--r-- | src/soc/intel/jasperlake/Makefile.inc | 26 |
1 files changed, 10 insertions, 16 deletions
diff --git a/src/soc/intel/jasperlake/Makefile.inc b/src/soc/intel/jasperlake/Makefile.inc index b02dc10250..29db4f3d00 100644 --- a/src/soc/intel/jasperlake/Makefile.inc +++ b/src/soc/intel/jasperlake/Makefile.inc @@ -1,4 +1,4 @@ -ifeq ($(CONFIG_SOC_INTEL_TIGERLAKE_BASE_COPY),y) +ifeq ($(CONFIG_SOC_INTEL_JASPERLAKE_COPY),y) subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode @@ -20,15 +20,12 @@ bootblock-y += bootblock/cpu.c bootblock-y += bootblock/pch.c bootblock-y += bootblock/report_platform.c bootblock-y += espi.c -bootblock-$(CONFIG_SOC_INTEL_TIGERLAKE_COPY) += gpio_tgl.c -bootblock-$(CONFIG_SOC_INTEL_JASPERLAKE_COPY) += gpio_jsl.c +bootblock-y += gpio.c bootblock-y += p2sb.c romstage-y += espi.c -romstage-$(CONFIG_SOC_INTEL_TIGERLAKE_COPY) += meminit_tgl.c -romstage-$(CONFIG_SOC_INTEL_JASPERLAKE_COPY) += meminit_jsl.c -romstage-$(CONFIG_SOC_INTEL_TIGERLAKE_COPY) += gpio_tgl.c -romstage-$(CONFIG_SOC_INTEL_JASPERLAKE_COPY) += gpio_jsl.c +romstage-y += gpio.c +romstage-y += meminit.c romstage-y += reset.c ramstage-y += acpi.c @@ -37,10 +34,8 @@ ramstage-y += cpu.c ramstage-y += elog.c ramstage-y += espi.c ramstage-y += finalize.c -ramstage-$(CONFIG_SOC_INTEL_TIGERLAKE_COPY) += fsp_params_tgl.c -ramstage-$(CONFIG_SOC_INTEL_JASPERLAKE_COPY) += fsp_params_jsl.c -ramstage-$(CONFIG_SOC_INTEL_TIGERLAKE_COPY) += gpio_tgl.c -ramstage-$(CONFIG_SOC_INTEL_JASPERLAKE_COPY) += gpio_jsl.c +ramstage-y += fsp_params.c +ramstage-y += gpio.c ramstage-y += graphics.c ramstage-y += lockdown.c ramstage-y += p2sb.c @@ -50,17 +45,16 @@ ramstage-y += smmrelocate.c ramstage-y += systemagent.c ramstage-y += sd.c -smm-$(CONFIG_SOC_INTEL_TIGERLAKE_COPY) += gpio_tgl.c -smm-$(CONFIG_SOC_INTEL_JASPERLAKE_COPY) += gpio_jsl.c +smm-y += gpio.c smm-y += p2sb.c smm-y += pmc.c smm-y += pmutil.c smm-y += smihandler.c smm-y += uart.c -verstage-$(CONFIG_SOC_INTEL_TIGERLAKE_COPY) += gpio_tgl.c +verstage-y += gpio.c -CPPFLAGS_common += -I$(src)/soc/intel/tigerlake -CPPFLAGS_common += -I$(src)/soc/intel/tigerlake/include +CPPFLAGS_common += -I$(src)/soc/intel/jasperlake +CPPFLAGS_common += -I$(src)/soc/intel/jasperlake/include endif |