diff options
| author | Krishna Prasad Bhat <krishna.p.bhat.d@intel.com> | 2020-04-21 19:09:43 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-18 07:15:59 +0000 |
| commit | ed3496730322286370b956e3eeb038ee56a41c74 (patch) | |
| tree | 2f2d81ee096d8b6bd4edcd6c6242dce3c17ccfdd /src/soc/intel/jasperlake/Makefile.inc | |
| parent | 2abe9cf2d7bc067d07e35f214930a2fb8047d194 (diff) | |
soc/intel/jasperlake: Add function to display ME firmware status info
Add function to display ME Host Firmware Status registers. Make use of
print_me_fw_version() from CSE lib to print ME firmware version information.
Add manufacturing mode field in HFSTS1 register for JSL in place of,
spi_protection_mode in TGL.
BUG=None
BRANCH=None
TEST=Build and boot jslrvp. In coreboot logs, ME info can be seen.
ME: Version: 13.5.0.7049
ME: HFSTS1 : 0x90006255
ME: HFSTS2 : 0x82100136
ME: HFSTS3 : 0x00000020
ME: HFSTS4 : 0x00004800
ME: HFSTS5 : 0x00000000
ME: HFSTS6 : 0x00400006
ME: Manufacturing Mode : YES
ME: FW Partition Table : OK
ME: Bringup Loader Failure : NO
ME: Firmware Init Complete : YES
ME: Boot Options Present : NO
ME: Update In Progress : NO
ME: D0i3 Support : YES
ME: Low Power State Enabled : NO
ME: CPU Replaced : YES
ME: CPU Replacement Valid : YES
ME: Current Working State : 5
ME: Current Operation State : 1
ME: Current Operation Mode : 0
ME: Error Code : 6
ME: CPU Debug Disabled : YES
ME: TXT Support : NO
Change-Id: Ic6b1c9410db8f06ac24fd997772b2ede04264bee
Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40570
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/soc/intel/jasperlake/Makefile.inc')
| -rw-r--r-- | src/soc/intel/jasperlake/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/jasperlake/Makefile.inc b/src/soc/intel/jasperlake/Makefile.inc index 4a65adc111..c5ad4d2095 100644 --- a/src/soc/intel/jasperlake/Makefile.inc +++ b/src/soc/intel/jasperlake/Makefile.inc @@ -44,6 +44,7 @@ ramstage-y += reset.c ramstage-y += smmrelocate.c ramstage-y += systemagent.c ramstage-y += sd.c +ramstage-y += me.c smm-y += gpio.c smm-y += p2sb.c |