diff options
| author | Matt DeVillier <matt.devillier@gmail.com> | 2023-09-21 13:56:44 -0500 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-09-25 14:00:43 +0000 |
| commit | 3e4f586ec07b6e5e908c66088b5765f762aa86fe (patch) | |
| tree | 9b60327e3fb03ca6a0a4b00e048adc6dedca43fd /src/soc/intel/jasperlake/Kconfig | |
| parent | 8e2e33a044262aa5b74cd2cb330fb4943d14b59f (diff) | |
Revert "soc/intel/jasperlake: Enable early caching of RAMTOP region"
This reverts commit 21e61847c4cf643d79855deba8f58fd45808d571.
Reverting as it breaks booting on google/dedede based boards. First boot
after flashing is successful, 2nd hangs with the following error:
[EMERG] FspMemoryInit returned with error 0x80000003!
TEST=build/boot google/dedede (magpie, metaknight)
Change-Id: I6a2474617b444414c4248dbeda23ed0915704a17
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78091
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm>
Diffstat (limited to 'src/soc/intel/jasperlake/Kconfig')
| -rw-r--r-- | src/soc/intel/jasperlake/Kconfig | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig index 1e1f2623ab..ff5def3263 100644 --- a/src/soc/intel/jasperlake/Kconfig +++ b/src/soc/intel/jasperlake/Kconfig @@ -66,8 +66,7 @@ config SOC_INTEL_JASPERLAKE select USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM select USE_FSP_NOTIFY_PHASE_READY_TO_BOOT select USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE - select SOC_INTEL_COMMON_BASECODE - select SOC_INTEL_COMMON_BASECODE_RAMTOP + select SOC_INTEL_COMMON_BASECODE if SOC_INTEL_CSE_LITE_SKU help Intel Jasperlake support |