coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)

This patch is a raw application of

 find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g'

Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

10 files changed, 14 insertions, 14 deletions

diff --git a/src/soc/intel/icelake/acpi.c b/src/soc/intel/icelake/acpi.c
index 967fe284bd..1ad89600c1 100644
--- a/src/soc/intel/icelake/acpi.c
+++ b/src/soc/intel/icelake/acpi.c
@@ -202,14 +202,14 @@ void acpi_create_gnvs(struct global_nvs_t *gnvs)
 	/* CPU core count */
 	gnvs->pcnt = dev_count_cpu();
 
-	if (IS_ENABLED(CONFIG_CONSOLE_CBMEM))
+	if (CONFIG(CONSOLE_CBMEM))
 		/* Update the mem console pointer. */
 		gnvs->cbmc = (uintptr_t)cbmem_find(CBMEM_ID_CONSOLE);
 
-	if (IS_ENABLED(CONFIG_CHROMEOS)) {
+	if (CONFIG(CHROMEOS)) {
 		/* Initialize Verified Boot data */
 		chromeos_init_chromeos_acpi(&(gnvs->chromeos));
-		if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC)) {
+		if (CONFIG(EC_GOOGLE_CHROMEEC)) {
 			gnvs->chromeos.vbt2 = google_ec_running_ro() ?
 				ACTIVE_ECFW_RO : ACTIVE_ECFW_RW;
 		} else
diff --git a/src/soc/intel/icelake/bootblock/bootblock.c b/src/soc/intel/icelake/bootblock/bootblock.c
index d26fa4210d..b76dc4ba37 100644
--- a/src/soc/intel/icelake/bootblock/bootblock.c
+++ b/src/soc/intel/icelake/bootblock/bootblock.c
@@ -32,7 +32,7 @@ void bootblock_soc_early_init(void)
 	bootblock_pch_early_init();
 	bootblock_cpu_init();
 	pch_early_iorange_init();
-	if (IS_ENABLED(CONFIG_INTEL_LPSS_UART_FOR_CONSOLE))
+	if (CONFIG(INTEL_LPSS_UART_FOR_CONSOLE))
 		uart_bootblock_init();
 }
 
diff --git a/src/soc/intel/icelake/bootblock/cpu.c b/src/soc/intel/icelake/bootblock/cpu.c
index f02b09027a..e23286c2d2 100644
--- a/src/soc/intel/icelake/bootblock/cpu.c
+++ b/src/soc/intel/icelake/bootblock/cpu.c
@@ -20,7 +20,7 @@
 void bootblock_cpu_init(void)
 {
 	/* Temporarily cache the memory-mapped boot media. */
-	if (IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED) &&
-		IS_ENABLED(CONFIG_BOOT_DEVICE_SPI_FLASH))
+	if (CONFIG(BOOT_DEVICE_MEMORY_MAPPED) &&
+		CONFIG(BOOT_DEVICE_SPI_FLASH))
 		fast_spi_cache_bios_region();
 }
diff --git a/src/soc/intel/icelake/bootblock/pch.c b/src/soc/intel/icelake/bootblock/pch.c
index ff4d966079..2d35f5bf39 100644
--- a/src/soc/intel/icelake/bootblock/pch.c
+++ b/src/soc/intel/icelake/bootblock/pch.c
@@ -139,7 +139,7 @@ void pch_early_iorange_init(void)
 		LPC_IOE_EC_62_66 | LPC_IOE_LGE_200;
 
 	/* IO Decode Range */
-	if (IS_ENABLED(CONFIG_DRIVERS_UART_8250IO))
+	if (CONFIG(DRIVERS_UART_8250IO))
 		lpc_io_setup_comm_a_b();
 
 	/* IO Decode Enable */
diff --git a/src/soc/intel/icelake/chip.c b/src/soc/intel/icelake/chip.c
index 0fb0b0ecec..0978ab3dea 100644
--- a/src/soc/intel/icelake/chip.c
+++ b/src/soc/intel/icelake/chip.c
@@ -30,7 +30,7 @@
 #include <soc/ramstage.h>
 #include <string.h>
 
-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
 const char *soc_acpi_name(const struct device *dev)
 {
 	if (dev->path.type == DEVICE_PATH_DOMAIN)
@@ -129,7 +129,7 @@ static struct device_operations pci_domain_ops = {
 	.read_resources   = &pci_domain_read_resources,
 	.set_resources    = &pci_domain_set_resources,
 	.scan_bus         = &pci_domain_scan_bus,
-	#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+	#if CONFIG(HAVE_ACPI_TABLES)
 	.acpi_name        = &soc_acpi_name,
 	#endif
 };
diff --git a/src/soc/intel/icelake/graphics.c b/src/soc/intel/icelake/graphics.c
index f0ad0e25a0..1539b42108 100644
--- a/src/soc/intel/icelake/graphics.c
+++ b/src/soc/intel/icelake/graphics.c
@@ -54,7 +54,7 @@ void graphics_soc_init(struct device *dev)
 	 * In case of non-FSP solution, SoC need to select VGA_ROM_RUN
 	 * Kconfig to perform GFX initialization through VGA OpRom.
 	 */
-	if (IS_ENABLED(CONFIG_INTEL_GMA_ADD_VBT))
+	if (CONFIG(INTEL_GMA_ADD_VBT))
 		return;
 
 	/* IGD needs to Bus Master */
diff --git a/src/soc/intel/icelake/include/soc/smm.h b/src/soc/intel/icelake/include/soc/smm.h
index a9cd748b0c..f556b11514 100644
--- a/src/soc/intel/icelake/include/soc/smm.h
+++ b/src/soc/intel/icelake/include/soc/smm.h
@@ -49,7 +49,7 @@ struct smm_relocation_params {
 /* Mainboard handler for eSPI SMIs */
 void mainboard_smi_espi_handler(void);
 
-#if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)
+#if CONFIG(HAVE_SMI_HANDLER)
 void smm_relocation_handler(int cpu, uintptr_t curr_smbase,
 				uintptr_t staggered_smbase);
 void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
diff --git a/src/soc/intel/icelake/lpc.c b/src/soc/intel/icelake/lpc.c
index e195865143..a3bce93a7d 100644
--- a/src/soc/intel/icelake/lpc.c
+++ b/src/soc/intel/icelake/lpc.c
@@ -220,7 +220,7 @@ void lpc_soc_init(struct device *dev)
 	lpc_enable_pci_clk_cntl();
 
 	/* Set LPC Serial IRQ mode */
-	if (IS_ENABLED(CONFIG_SERIRQ_CONTINUOUS_MODE))
+	if (CONFIG(SERIRQ_CONTINUOUS_MODE))
 		lpc_set_serirq_mode(SERIRQ_CONTINUOUS);
 	else
 		lpc_set_serirq_mode(SERIRQ_QUIET);
diff --git a/src/soc/intel/icelake/memmap.c b/src/soc/intel/icelake/memmap.c
index faf1b2a6c3..821162e768 100644
--- a/src/soc/intel/icelake/memmap.c
+++ b/src/soc/intel/icelake/memmap.c
@@ -146,7 +146,7 @@ static size_t calculate_traditional_mem_size(uintptr_t dram_base,
 	traditional_mem_base -= sa_get_tseg_size();
 
 	/* Get DPR size */
-	if (IS_ENABLED(CONFIG_SA_ENABLE_DPR))
+	if (CONFIG(SA_ENABLE_DPR))
 		traditional_mem_base -= sa_get_dpr_size();
 
 	/* Traditional Area Size */
diff --git a/src/soc/intel/icelake/smihandler.c b/src/soc/intel/icelake/smihandler.c
index 0c35d722fa..ddf642003f 100644
--- a/src/soc/intel/icelake/smihandler.c
+++ b/src/soc/intel/icelake/smihandler.c
@@ -91,7 +91,7 @@ void smihandler_soc_at_finalize(void)
 
 void smihandler_soc_check_illegal_access(uint32_t tco_sts)
 {
-	if (!((tco_sts & (1 << 8)) && IS_ENABLED(CONFIG_SPI_FLASH_SMM)
+	if (!((tco_sts & (1 << 8)) && CONFIG(SPI_FLASH_SMM)
 			&& fast_spi_wpd_status()))
 		return;