diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2019-06-04 12:14:44 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2019-06-09 02:46:37 +0000 |
| commit | 51b2fd82d32025a47901c5607afa370376fae8f1 (patch) | |
| tree | 601ffb91262dc74e272e88252a4e97307537c10f /src/soc/intel/icelake | |
| parent | 94cdec686e41fa2d632241c011cef87093cd4c17 (diff) | |
soc/intel/common: Skip SoC GT programming based on CONFIG_SKIP_GRAPHICS_ENABLING
Skip GT specific programming in coreboot to support early
parts without GT enable.
Change-Id: I231e13367cbfbafbfb0cb4235487dbcbcae76820
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33189
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/icelake')
| -rw-r--r-- | src/soc/intel/icelake/graphics.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/icelake/graphics.c b/src/soc/intel/icelake/graphics.c index 0fbddf06e9..07090331cb 100644 --- a/src/soc/intel/icelake/graphics.c +++ b/src/soc/intel/icelake/graphics.c @@ -34,6 +34,10 @@ void graphics_soc_init(struct device *dev) { uint32_t ddi_buf_ctl; + /* Skip IGD GT programming */ + if (CONFIG(SKIP_GRAPHICS_ENABLING)) + return; + /* * Enable DDI-A (eDP) 4-lane operation if the link is not up yet. * This will allow the kernel to use 4-lane eDP links properly |