diff options
| author | Benjamin Doron <benjamin.doron00@gmail.com> | 2020-06-28 02:43:53 +0000 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2020-10-12 23:11:04 +0000 |
| commit | bbb8123d663d387220dcdd070442d7bec1aceb91 (patch) | |
| tree | db106b374e904efd7b0e85cec7625fc7fc41da1c /src/soc/intel/icelake | |
| parent | ceeeadb890dded622432843bb7622ee64c22c9e0 (diff) | |
soc/intel: Configure PAVP at compile-time
Expose configuration of Intel PAVP (Protected Audio-Video Path, a
digital rights protection/management (DRM) technology for
multimedia content) to Kconfig.
Per the FSP default, this was always being enabled previously.
Change-Id: I2aae741bb30e3be3c64324cd6334778bd271a903
Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42745
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/icelake')
| -rw-r--r-- | src/soc/intel/icelake/fsp_params.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/icelake/fsp_params.c b/src/soc/intel/icelake/fsp_params.c index 8e33174345..184b9d6bf6 100644 --- a/src/soc/intel/icelake/fsp_params.c +++ b/src/soc/intel/icelake/fsp_params.c @@ -76,6 +76,8 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) else params->PeiGraphicsPeimInit = 0; + params->PavpEnable = CONFIG(PAVP); + /* Unlock upper 8 bytes of RTC RAM */ params->PchLockDownRtcMemoryLock = 0; |