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authorSubrata Banik <subrata.banik@intel.com>2020-09-28 18:43:47 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-10-03 06:58:07 +0000
commit0359d9dde37b7cce3009cfe630713042601ac5d8 (patch)
treed4d177be70a8db07b58159cbda768d12059f2222 /src/soc/intel/icelake
parent3e959d8e2a05a50ca16430dcacfd4794db1e49fc (diff)
soc/intel: Make use of PMC low power program from common block
List of changes: 1. Select PMC_LOW_POWER_MODE_PROGRAM from applicable SoC directory 2. Remove redundant PMC programming from SoC and refer to common code block 3. Remove unused 'reg8' and 'reg32' variable as applicable from SoC function. Change-Id: I18894c49cfc6e88675b5fb71bca0412e5639fb4b Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45796 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/icelake')
-rw-r--r--src/soc/intel/icelake/Kconfig1
-rw-r--r--src/soc/intel/icelake/finalize.c19
-rw-r--r--src/soc/intel/icelake/include/soc/pmc.h1
3 files changed, 7 insertions, 14 deletions
diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig
index cad3119616..0343263256 100644
--- a/src/soc/intel/icelake/Kconfig
+++ b/src/soc/intel/icelake/Kconfig
@@ -30,6 +30,7 @@ config CPU_SPECIFIC_OPTIONS
select FSP_PEIM_TO_PEIM_INTERFACE
select REG_SCRIPT
select PMC_GLOBAL_RESET_ENABLE_LOCK
+ select PMC_LOW_POWER_MODE_PROGRAM
select CPU_INTEL_COMMON_SMM
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
diff --git a/src/soc/intel/icelake/finalize.c b/src/soc/intel/icelake/finalize.c
index 53e3cbafb7..363f579b0f 100644
--- a/src/soc/intel/icelake/finalize.c
+++ b/src/soc/intel/icelake/finalize.c
@@ -9,6 +9,7 @@
#include <device/pci.h>
#include <intelblocks/lpc_lib.h>
#include <intelblocks/pcr.h>
+#include <intelblocks/pmclib.h>
#include <intelblocks/tco.h>
#include <intelblocks/thermal.h>
#include <spi-generic.h>
@@ -40,10 +41,7 @@ static void pch_handle_sideband(config_t *config)
static void pch_finalize(void)
{
- uint32_t reg32;
- uint8_t *pmcbase;
config_t *config;
- uint8_t reg8;
/* TCO Lock down */
tco_lockdown();
@@ -69,19 +67,12 @@ static void pch_finalize(void)
* returns NULL for PCH_DEV_PMC device.
*/
config = config_of_soc();
- pmcbase = pmc_mmio_regs();
- if (config->PmTimerDisabled) {
- reg8 = read8(pmcbase + PCH_PWRM_ACPI_TMR_CTL);
- reg8 |= (1 << 1);
- write8(pmcbase + PCH_PWRM_ACPI_TMR_CTL, reg8);
- }
+ if (config->PmTimerDisabled)
+ pmc_disable_acpi_timer();
/* Disable XTAL shutdown qualification for low power idle. */
- if (config->s0ix_enable) {
- reg32 = read32(pmcbase + CPPMVRIC);
- reg32 |= XTALSDQDIS;
- write32(pmcbase + CPPMVRIC, reg32);
- }
+ if (config->s0ix_enable)
+ pmc_ignore_xtal_shutdown();
pch_handle_sideband(config);
diff --git a/src/soc/intel/icelake/include/soc/pmc.h b/src/soc/intel/icelake/include/soc/pmc.h
index 961207c871..26dae7e58d 100644
--- a/src/soc/intel/icelake/include/soc/pmc.h
+++ b/src/soc/intel/icelake/include/soc/pmc.h
@@ -98,6 +98,7 @@
#define PCH2CPU_TT_EN (1 << 26)
#define PCH_PWRM_ACPI_TMR_CTL 0x18FC
+#define ACPI_TIM_DIS (1 << 1)
#define GPIO_GPE_CFG 0x1920
#define GPE0_DWX_MASK 0xf
#define GPE0_DW_SHIFT(x) (4*(x))