diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-06-25 10:09:35 +0200 |
|---|---|---|
| committer | Werner Zeh <werner.zeh@siemens.com> | 2021-06-28 04:16:48 +0000 |
| commit | f585c6eeeafb575cc64452d8519a172ffb4ffc8b (patch) | |
| tree | 352be415388c8f1baa98b3f5641f2f6f05f19260 /src/soc/intel/icelake | |
| parent | c44ffc30846fdfa7cf814316d24dfecd2c22b0ae (diff) | |
soc/intel: Drop casts around `soc_read_pmc_base()`
The `soc_read_pmc_base()` function returns an `uintptr_t`, which is then
casted to a pointer type for use with `read32()` and/or `write32()`. But
since commit b324df6a540d154cc9267c0398654f9142aae052 (arch/x86: Provide
readXp/writeXp helpers in arch/mmio.h), the `read32p()` and `write32p()`
functions live in `arch/mmio.h`. These functions use the `uintptr_t type
for the address parameter instead of a pointer type, and using them with
the `soc_read_pmc_base()` function allows dropping the casts to pointer.
Change-Id: Iaf16e6f23d139e6f79360d9a29576406b7b15b07
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55840
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc/intel/icelake')
| -rw-r--r-- | src/soc/intel/icelake/acpi.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/soc/intel/icelake/acpi.c b/src/soc/intel/icelake/acpi.c index 67c43e2467..cac2138200 100644 --- a/src/soc/intel/icelake/acpi.c +++ b/src/soc/intel/icelake/acpi.c @@ -162,8 +162,7 @@ void soc_fill_fadt(acpi_fadt_t *fadt) } uint32_t soc_read_sci_irq_select(void) { - uintptr_t pmc_bar = soc_read_pmc_base(); - return read32((void *)pmc_bar + IRQ_REG); + return read32p(soc_read_pmc_base() + IRQ_REG); } void soc_fill_gnvs(struct global_nvs *gnvs) |