diff options
| author | Subrata Banik <subratabanik@google.com> | 2022-02-06 18:21:50 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-15 17:20:43 +0000 |
| commit | b3671ec5de62f9c15ee74a8134b4a711cc785886 (patch) | |
| tree | 39ee15ffcde413516b99a463c9fc38b5d75b307c /src/soc/intel/icelake | |
| parent | 9e00a817f3b195b907ebd94dd408f0c35104d96e (diff) | |
soc/intel/*/pmc: Add `finalize` operation for pmc
This patch implements the required operations to perform prior to
booting to OS using coreboot native driver when platform decides
to skip FSP notify APIs, i.e., Ready to Boot and End Of Firmware.
Additionally, move the PMCON status bit clear operation to `.final` ops
to cover any such chances where FSP-S Notify Phase or any other later
boot stage may request a global reset and PMCON status bit remains set.
BUG=b:211954778
TEST=Able to build brya with these changes.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I0a0b869849d5d8c76031b8999f3d28817ac69247
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61649
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/soc/intel/icelake')
| -rw-r--r-- | src/soc/intel/icelake/pmc.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/soc/intel/icelake/pmc.c b/src/soc/intel/icelake/pmc.c index fd91cde57d..c0096007be 100644 --- a/src/soc/intel/icelake/pmc.c +++ b/src/soc/intel/icelake/pmc.c @@ -75,6 +75,15 @@ static void pmc_init(void *unused) */ if (!CONFIG(USE_PM_ACPI_TIMER)) setbits8(pmc_mmio_regs() + PCH_PWRM_ACPI_TMR_CTL, ACPI_TIM_DIS); + + /* + * Clear PMCON status bits (Global Reset/Power Failure/Host Reset Status bits) + * + * Perform the PMCON status bit clear operation from `.final` + * to cover any such chances where later boot stage requested a global + * reset and PMCON status bit remains set. + */ + pmc_clear_pmcon_sts(); } /* |