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authorSubrata Banik <subrata.banik@intel.com>2021-06-21 19:22:53 +0530
committerSubrata Banik <subrata.banik@intel.com>2021-06-23 08:25:56 +0000
commit1369544b3f6c571886f602824c5f005eb60e9a16 (patch)
treea2a3c94e11aca24ed3462fdec869825e8071c31e /src/soc/intel/icelake
parent7bfee2d70f45caf3fe6e769d7cd6ae6f305d9df5 (diff)
soc/intel/icelake: Use devfn_disable() function for XDCI
Use devfn_disable() for disabling a PCI device rather than using `dev->enabled = 0`. Also, use is_devfn_enabled() to get the device current state prior updating the FSP-S UPD for XDCI. TEST=FSP-S disabled XDCI when `xdci_can_enable` returns 0 and XDCI is disabled at PCI enumeration `PCI: 00:14.1: enabled 0`. Change-Id: I568cd39792eba1bbace4901e96d708d80f73c60a Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55724 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/icelake')
-rw-r--r--src/soc/intel/icelake/fsp_params.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/src/soc/intel/icelake/fsp_params.c b/src/soc/intel/icelake/fsp_params.c
index a849881bbd..eb608f376f 100644
--- a/src/soc/intel/icelake/fsp_params.c
+++ b/src/soc/intel/icelake/fsp_params.c
@@ -39,7 +39,6 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
int i;
FSP_S_CONFIG *params = &supd->FspsConfig;
- struct device *dev;
struct soc_intel_icelake_config *config;
config = config_of_soc();
@@ -139,10 +138,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
}
/* Enable xDCI controller if enabled in devicetree and allowed */
- dev = pcidev_on_root(PCH_DEV_SLOT_XHCI, 1);
if (!xdci_can_enable())
- dev->enabled = 0;
- params->XdciEnable = dev->enabled;
+ devfn_disable(pci_root_bus(), PCH_DEVFN_USBOTG);
+ params->XdciEnable = is_devfn_enabled(PCH_DEVFN_USBOTG);
/* PCI Express */
for (i = 0; i < ARRAY_SIZE(config->PcieClkSrcUsage); i++) {