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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-14 13:02:41 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-11-22 06:37:50 +0000
commitf5c0d612966d1ab3e8c2f1d1ae1de9ae2438bbab (patch)
tree2441da4161b6e11f38c17dd2b18c98ee431db4ad /src/soc/intel/icelake
parent75396f67aa6f1f24007714c2c959c3eefe7d0124 (diff)
intel/smm: Provide common smm_relocation_params
Pull in all copies of smm_relocation_params structs defined for intel platforms. Pull in all the inlined MSR accessors to the header file. Change-Id: I39c6cffee95433aea1a3c783b869eedfff094413 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34840 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/icelake')
-rw-r--r--src/soc/intel/icelake/Kconfig1
-rw-r--r--src/soc/intel/icelake/cpu.c1
-rw-r--r--src/soc/intel/icelake/include/soc/smm.h38
-rw-r--r--src/soc/intel/icelake/smmrelocate.c11
4 files changed, 1 insertions, 50 deletions
diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig
index 418c3171bd..cb9de149d3 100644
--- a/src/soc/intel/icelake/Kconfig
+++ b/src/soc/intel/icelake/Kconfig
@@ -36,6 +36,7 @@ config CPU_SPECIFIC_OPTIONS
select SMP
select SOC_AHCI_PORT_IMPLEMENTED_INVERT
select PMC_GLOBAL_RESET_ENABLE_LOCK
+ select CPU_INTEL_COMMON_SMM
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
select SOC_INTEL_COMMON_BLOCK
diff --git a/src/soc/intel/icelake/cpu.c b/src/soc/intel/icelake/cpu.c
index a2d9f7a6bc..e058442585 100644
--- a/src/soc/intel/icelake/cpu.c
+++ b/src/soc/intel/icelake/cpu.c
@@ -30,7 +30,6 @@
#include <soc/msr.h>
#include <soc/pci_devs.h>
#include <soc/pm.h>
-#include <soc/smm.h>
#include <soc/soc_chip.h>
static void soc_fsp_load(void)
diff --git a/src/soc/intel/icelake/include/soc/smm.h b/src/soc/intel/icelake/include/soc/smm.h
deleted file mode 100644
index 43931679bf..0000000000
--- a/src/soc/intel/icelake/include/soc/smm.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2018 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef _SOC_SMM_H_
-#define _SOC_SMM_H_
-
-#include <stdint.h>
-#include <cpu/x86/msr.h>
-#include <cpu/x86/smm.h>
-#include <soc/gpio.h>
-
-
-struct smm_relocation_params {
- uintptr_t ied_base;
- size_t ied_size;
- msr_t smrr_base;
- msr_t smrr_mask;
- /*
- * The smm_save_state_in_msrs field indicates if SMM save state
- * locations live in MSRs. This indicates to the CPUs how to adjust
- * the SMMBASE and IEDBASE
- */
- int smm_save_state_in_msrs;
-};
-
-#endif
diff --git a/src/soc/intel/icelake/smmrelocate.c b/src/soc/intel/icelake/smmrelocate.c
index 8f56ad6650..cc8a5ff2e8 100644
--- a/src/soc/intel/icelake/smmrelocate.c
+++ b/src/soc/intel/icelake/smmrelocate.c
@@ -30,20 +30,9 @@
#include <soc/cpu.h>
#include <soc/msr.h>
#include <soc/pci_devs.h>
-#include <soc/smm.h>
#include <soc/soc_chip.h>
#include <soc/systemagent.h>
-/* This gets filled in and used during relocation. */
-static struct smm_relocation_params smm_reloc_params;
-
-static inline void write_smrr(struct smm_relocation_params *relo_params)
-{
- printk(BIOS_DEBUG, "Writing SMRR. base = 0x%08x, mask=0x%08x\n",
- relo_params->smrr_base.lo, relo_params->smrr_mask.lo);
- wrmsr(IA32_SMRR_PHYS_BASE, relo_params->smrr_base);
- wrmsr(IA32_SMRR_PHYS_MASK, relo_params->smrr_mask);
-}
static void update_save_state(int cpu, uintptr_t curr_smbase,
uintptr_t staggered_smbase,