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author | Michael Niewöhner <foss@mniewoehner.de> | 2020-09-19 00:08:45 +0200 |
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committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-11-14 18:54:23 +0000 |
commit | ed21df6cec49f2c7dd5ae8286eaee958104e781d (patch) | |
tree | 0edd02eecacc4840645b01737a9a8c0c1b556c70 /src/soc/intel/icelake | |
parent | 77038b16fff3801b6209696cc4fea861800f1165 (diff) |
soc/intel/common/block: add code for ACPI CPPC entries generation
Copy the code for CPPC entries generation, needed for Intel SpeedShift,
from SKL to common ACPI code.
SKL is going to use common ACPI code, too, in the future, so this code
duplication will vanish soon.
Test: dumped SSDT from Clevo L140CU and checked decompiled version after
enabling CPPC entries via Kconfig
Change-Id: I1fcc2d0d7c6b6f35f8dd011f55dab8469be99d47
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45535
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/icelake')
0 files changed, 0 insertions, 0 deletions