soc/intel: Use config_of()

Change-Id: I0727a6b327410197cf32f598d1312737744386b3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34328
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: David Guckian

5 files changed, 7 insertions, 14 deletions

diff --git a/src/soc/intel/icelake/espi.c b/src/soc/intel/icelake/espi.c
index a98821c903..efde625d60 100644
--- a/src/soc/intel/icelake/espi.c
+++ b/src/soc/intel/icelake/espi.c
@@ -48,7 +48,7 @@ const struct lpc_mmio_range *soc_get_fixed_mmio_ranges()
 
 void soc_get_gen_io_dec_range(const struct device *dev, uint32_t *gen_io_dec)
 {
-	const config_t *config = dev->chip_info;
+	const config_t *config = config_of(dev);
 
 	gen_io_dec[0] = config->gen1_dec;
 	gen_io_dec[1] = config->gen2_dec;
diff --git a/src/soc/intel/icelake/memmap.c b/src/soc/intel/icelake/memmap.c
index 67f71da28a..317f0fb702 100644
--- a/src/soc/intel/icelake/memmap.c
+++ b/src/soc/intel/icelake/memmap.c
@@ -166,7 +166,7 @@ static size_t calculate_reserved_mem_size(uintptr_t dram_base,
 	size_t reserve_mem_size;
 	const struct soc_intel_icelake_config *config;
 
-	config = dev->chip_info;
+	config = config_of(dev);
 
 	/* Get PRMRR size */
 	reserve_mem_base -= get_prmrr_size(reserve_mem_base, config);
diff --git a/src/soc/intel/icelake/romstage/fsp_params.c b/src/soc/intel/icelake/romstage/fsp_params.c
index 89dc99a18a..a78c8a49cf 100644
--- a/src/soc/intel/icelake/romstage/fsp_params.c
+++ b/src/soc/intel/icelake/romstage/fsp_params.c
@@ -76,11 +76,11 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
 
 void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
 {
-	const struct device *dev = pcidev_on_root(0, 0);
-	assert(dev != NULL);
-	const struct soc_intel_icelake_config *config = dev->chip_info;
+	const struct soc_intel_icelake_config *config;
 	FSP_M_CONFIG *m_cfg = &mupd->FspmConfig;
 
+	config = config_of_path(SA_DEVFN_ROOT);
+
 	soc_memory_init_params(m_cfg, config);
 
 	/* Enable SMBus controller based on config */
diff --git a/src/soc/intel/icelake/sd.c b/src/soc/intel/icelake/sd.c
index 4d84bb43ff..f7c0eb3fa7 100644
--- a/src/soc/intel/icelake/sd.c
+++ b/src/soc/intel/icelake/sd.c
@@ -18,7 +18,7 @@
 
 int sd_fill_soc_gpio_info(struct acpi_gpio *gpio, struct device *dev)
 {
-	config_t *config = dev->chip_info;
+	config_t *config = config_of(dev);
 
 	if (!config->sdcard_cd_gpio)
 		return -1;
diff --git a/src/soc/intel/icelake/smihandler.c b/src/soc/intel/icelake/smihandler.c
index 3d41ee034d..8db2c3bbb4 100644
--- a/src/soc/intel/icelake/smihandler.c
+++ b/src/soc/intel/icelake/smihandler.c
@@ -75,15 +75,8 @@ static void pch_disable_heci(void)
 void smihandler_soc_at_finalize(void)
 {
 	const struct soc_intel_icelake_config *config;
-	const struct device *dev = pcidev_path_on_root(PCH_DEVFN_CSE);
 
-	if (!dev || !dev->chip_info) {
-		printk(BIOS_ERR, "%s: Could not find SoC devicetree config!\n",
-		       __func__);
-		return;
-	}
-
-	config = dev->chip_info;
+	config = config_of_path(PCH_DEVFN_CSE);
 
 	if (!config->HeciEnabled && CONFIG(HECI_DISABLE_USING_SMM))
 		pch_disable_heci();