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authorJohn Zhao <john.zhao@intel.com>2022-08-03 20:07:03 -0700
committerTim Wawrzynczak <twawrzynczak@chromium.org>2022-08-12 17:11:22 +0000
commiteb80b1efa36c99e485b2604e913c2aa316168eea (patch)
treeefaf98993f3057e57523d30b9ba5f0ca77c9e60b /src/soc/intel/icelake/spi.c
parent8d37fbdcf9752dd35caf9d2588c740c13f3d9623 (diff)
soc/intel/meteorlake: Provide access to IOE through P2SB SBI for TCSS
This change provides access to IOE through P2SB Sideband interface for Meteor Lake TCSS functions of pad configuration and Thunderbolt authentication. There is a policy of locking the P2SB access at the end of platform initialization. The tbt_authentication is read from IOM register through IOE P2SB at early silicon initialization phase and its usage is deferred to usb4 driver. BUG=b:213574324 TEST=Built coreboot and validated booting to OS successfully on MTLRVP board. No boot hung was observed. Change-Id: Icd644c945bd293a8b9c4a364aaed99ec4a7c12f9 Signed-off-by: John Zhao <john.zhao@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66410 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Tarun Tuli <taruntuli@google.com>
Diffstat (limited to 'src/soc/intel/icelake/spi.c')
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