aboutsummaryrefslogtreecommitdiff
path: root/src/soc/intel/icelake/romstage/Makefile.inc
diff options
context:
space:
mode:
authorSubrata Banik <subrata.banik@intel.com>2019-04-29 13:38:59 +0530
committerSubrata Banik <subrata.banik@intel.com>2019-05-02 06:03:06 +0000
commit67524b57af238490de9d00ba0caf08dfb73a2b10 (patch)
tree1b0bbf8f34d7266079d279a0db235bb4c241878f /src/soc/intel/icelake/romstage/Makefile.inc
parent83fe4c4e4796b10f2a21d11c2b6a3543851271f7 (diff)
soc/intel/icelake: Move power_state functions to pmutil.c
This patch ports CB:31787 and CB:31908 changes from CNL to ICL. This change moves soc_fill_power_state and soc_prev_sleep_state to pmutil.c. It allows the functions to be used across romstage and smm. Also fix GEN_PMCON bit checks as below: ICL PCH has PWR_FLR, SUS_PWR_FLR and HOST_RST_STS bits in GEN_PMCON_A and so this change updates the check for these bits to use GEN_PMCON_A instead of GEN_PMCON_B. Change-Id: Ib7ab95b7bbcc97a076d27a11db2105f7b976b521 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32506 Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/icelake/romstage/Makefile.inc')
-rw-r--r--src/soc/intel/icelake/romstage/Makefile.inc1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/icelake/romstage/Makefile.inc b/src/soc/intel/icelake/romstage/Makefile.inc
index 9fc199deee..28e7eada55 100644
--- a/src/soc/intel/icelake/romstage/Makefile.inc
+++ b/src/soc/intel/icelake/romstage/Makefile.inc
@@ -14,6 +14,5 @@
#
romstage-y += fsp_params.c
-romstage-y += power_state.c
romstage-y += romstage.c
romstage-y += systemagent.c