diff options
author | Angel Pons <th3fanbus@gmail.com> | 2021-04-17 13:02:37 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2021-04-21 09:17:40 +0000 |
commit | 505e383ccbe4cec2483341833e92ea8c1d9330e8 (patch) | |
tree | c37af425b5babc4db89b05f461dcd7418572bb69 /src/soc/intel/icelake/pmc.c | |
parent | f643b63c4dcd74c3de0c1d54de8b740d831d6d73 (diff) |
soc/intel: Move pmc_soc_set_afterg3_en() to pmutil.c
Commit 2c26108208e4aa48de21be576ab6cad9286d7934 moved this function to
pmutil.c for Tiger Lake. Do this to all other platforms for consistency.
For Skylake, __SIMPLE_DEVICE__ preprocessor guards are no longer needed.
With this change, pmc.c is only needed in ramstage. Adjust Makefile.inc
accordingly, and drop ENV_RAMSTAGE guards from Skylake.
Change-Id: I424eb359c898f155659d085b888410b6bb58b9ed
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52464
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/soc/intel/icelake/pmc.c')
-rw-r--r-- | src/soc/intel/icelake/pmc.c | 17 |
1 files changed, 0 insertions, 17 deletions
diff --git a/src/soc/intel/icelake/pmc.c b/src/soc/intel/icelake/pmc.c index 5bd4438946..ee40fee5f2 100644 --- a/src/soc/intel/icelake/pmc.c +++ b/src/soc/intel/icelake/pmc.c @@ -11,23 +11,6 @@ #include <soc/pm.h> #include <soc/soc_chip.h> -/* - * Set which power state system will be after reapplying - * the power (from G3 State) - */ -void pmc_soc_set_afterg3_en(const bool on) -{ - uint8_t reg8; - uint8_t *const pmcbase = pmc_mmio_regs(); - - reg8 = read8(pmcbase + GEN_PMCON_A); - if (on) - reg8 &= ~SLEEP_AFTER_POWER_FAIL; - else - reg8 |= SLEEP_AFTER_POWER_FAIL; - write8(pmcbase + GEN_PMCON_A, reg8); -} - static void config_deep_sX(uint32_t offset, uint32_t mask, int sx, int enable) { uint32_t reg; |