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| author | Subrata Banik <subrata.banik@intel.com> | 2019-09-10 15:51:17 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2019-09-12 04:28:20 +0000 |
| commit | 3eff037f8cbe99f72626c0f25c0989ea638599ef (patch) | |
| tree | d4db81b1d76e96e38e6862389e8d183319a8ca9d /src/soc/intel/icelake/memmap.c | |
| parent | b3426c03b4cf84af871c6d4c32afed2086f3fd1a (diff) | |
soc/{amd, intel}: Make use of common postcar_enable_tseg_cache() API
This patch removes dedicated function call to make TSEG region cache
from soc and refers to postcar_enable_tseg_cache().
BUG=b:140008206
Change-Id: I18a032b43a2093c8ae86735c119d8dfee40570b1
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35025
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/soc/intel/icelake/memmap.c')
0 files changed, 0 insertions, 0 deletions