diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2020-07-30 11:31:55 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-08-01 06:55:36 +0000 |
| commit | 6362de3829c1762632e3aa16b1af0fd0a9a1e625 (patch) | |
| tree | 02298fb9fa0c11fc74dc67743a2cdbeaf38d07c5 /src/soc/intel/icelake/fsp_params.c | |
| parent | 46f807324916f223282e5c8fee1bfe4595eeb1f2 (diff) | |
soc/intel/{icl,jsl,tgl}: Remove SkipMpInit UPD as deprecated
FSP default UPD for SkipMpInit is set to 0 which refers to run CPU
feature programming on all cores (BSP + APs).
Setting SkipMpInit=1 is not recommended as it will only limit CPU
feature programming on BSP.
TEST=Able to perform CPU feature programming by FSP on all cores
using external MP PPI services.
Change-Id: I22e70f5f15e53c5fabd78cc3698c4d718b607af6
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44058
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Diffstat (limited to 'src/soc/intel/icelake/fsp_params.c')
| -rw-r--r-- | src/soc/intel/icelake/fsp_params.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/intel/icelake/fsp_params.c b/src/soc/intel/icelake/fsp_params.c index e3d355df86..d4485c6705 100644 --- a/src/soc/intel/icelake/fsp_params.c +++ b/src/soc/intel/icelake/fsp_params.c @@ -73,8 +73,6 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) /* Mandatory to make use of CpuMpPpi implementation from ICL onwards */ params->CpuMpPpi = (uintptr_t) mp_fill_ppi_services_data(); - /* TODO: Remove me as SkipMpInit is getting deprecated */ - params->SkipMpInit = 0; mainboard_silicon_init_params(params); |