diff options
author | Michael Niewöhner <foss@mniewoehner.de> | 2021-01-23 13:59:01 +0100 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2021-01-24 14:03:44 +0000 |
commit | 0fc6bec763f9194fc20ec4e3a6bf1e2a40a88e33 (patch) | |
tree | 603cec76ee2fe6bf44b57011f60f556df1cbb5d9 /src/soc/intel/icelake/espi.c | |
parent | 89fe2f34b48dfa053de4c82771f078a136ffff20 (diff) |
soc/intel/icl: drop wrong, unused code
The ids used in function `soc_get_pch_series()` are not valid for
Icelake. Since it's not even used, instead of fixing it, drop it.
Change-Id: I4a1ee4b84f11ea314cb666ce4506ff90168da0ca
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49875
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/icelake/espi.c')
-rw-r--r-- | src/soc/intel/icelake/espi.c | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/src/soc/intel/icelake/espi.c b/src/soc/intel/icelake/espi.c index d2de406c60..fdcd83357e 100644 --- a/src/soc/intel/icelake/espi.c +++ b/src/soc/intel/icelake/espi.c @@ -36,24 +36,6 @@ void soc_setup_dmi_pcr_io_dec(uint32_t *gen_io_dec) pcr_write32(PID_DMI, PCR_DMI_LPCLGIR4, gen_io_dec[3]); } -uint8_t get_pch_series(void) -{ - uint16_t lpc_did_hi_byte; - - /* - * Fetch upper 8 bits on ESPI device ID to determine PCH type - * Adding 1 to the offset to fetch upper 8 bits - */ - lpc_did_hi_byte = pci_read_config8(PCH_DEV_ESPI, PCI_DEVICE_ID + 1); - - if (lpc_did_hi_byte == 0x9D) - return PCH_LP; - else if (lpc_did_hi_byte == 0xA3) - return PCH_H; - else - return PCH_UNKNOWN_SERIES; -} - #if ENV_RAMSTAGE static void soc_mirror_dmi_pcr_io_dec(void) { |