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authorElyes HAOUAS <ehaouas@noos.fr>2019-03-21 15:38:06 +0100
committerNico Huber <nico.h@gmx.de>2019-04-26 16:49:13 +0000
commitc3385070d6e86dbde71dddbdef94ffa5579f9d11 (patch)
treee2d65c2c0550b67092d008ca31c3c22e11b932f0 /src/soc/intel/icelake/cpu.c
parent9df72e0471296d9bc2981646490c1f8b5b1e54e0 (diff)
soc/{amd,intel}/chip: Use local include for chip.h
Change-Id: Ic1fcbf4b54b7d0b5cda04ca9f7fc145050c867b8 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32014 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/icelake/cpu.c')
-rw-r--r--src/soc/intel/icelake/cpu.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/icelake/cpu.c b/src/soc/intel/icelake/cpu.c
index 62bcff6844..b1776a09a4 100644
--- a/src/soc/intel/icelake/cpu.c
+++ b/src/soc/intel/icelake/cpu.c
@@ -16,7 +16,6 @@
#include <arch/cpu.h>
#include <console/console.h>
#include <device/pci.h>
-#include <chip.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/mp.h>
#include <cpu/x86/msr.h>
@@ -33,6 +32,8 @@
#include <soc/pm.h>
#include <soc/smm.h>
+#include "chip.h"
+
static void soc_fsp_load(void)
{
fsps_load(romstage_handoff_is_resume());