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authorSubrata Banik <subrata.banik@intel.com>2019-05-15 21:04:37 +0530
committerPatrick Georgi <pgeorgi@google.com>2019-05-20 14:50:06 +0000
commitdd5fa024260bf6fd19c077d640c34e27b742115b (patch)
tree80a9d0a23d23325a454e4bf65002ad54271688e3 /src/soc/intel/icelake/chip.h
parentabdc9bc8c8605f2865b7a9cc956cbcc4402c1c43 (diff)
soc/intel/icelake: Make use of gpio_pm_configure()
Provide option in chip.h to set dynamic local clock gating setting. BUG=b:130764684 TEST=Able to build and boot ICL. Change-Id: Ic30a490aadb8cc9c05a19a05533ab0196c69b7f1 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32789 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/icelake/chip.h')
-rw-r--r--src/soc/intel/icelake/chip.h20
1 files changed, 20 insertions, 0 deletions
diff --git a/src/soc/intel/icelake/chip.h b/src/soc/intel/icelake/chip.h
index 3e2b78acd6..77611262a3 100644
--- a/src/soc/intel/icelake/chip.h
+++ b/src/soc/intel/icelake/chip.h
@@ -18,6 +18,7 @@
#include <intelblocks/chip.h>
#include <drivers/i2c/designware/dw_i2c.h>
+#include <intelblocks/gpio.h>
#include <intelblocks/gspi.h>
#include <stdint.h>
#include <soc/gpe.h>
@@ -263,6 +264,25 @@ struct soc_intel_icelake_config {
FORCE_ENABLE,
FORCE_DISABLE,
} CnviBtAudioOffload;
+
+ /*
+ * Override GPIO PM configuration:
+ * 0: Use FSP default GPIO PM program,
+ * 1: coreboot to override GPIO PM program
+ */
+ uint8_t gpio_override_pm;
+
+ /*
+ * GPIO PM configuration: 0 to disable, 1 to enable power gating
+ * Bit 6-7: Reserved
+ * Bit 5: MISCCFG_GPSIDEDPCGEN
+ * Bit 4: MISCCFG_GPRCOMPCDLCGEN
+ * Bit 3: MISCCFG_GPRTCDLCGEN
+ * Bit 2: MISCCFG_GSXLCGEN
+ * Bit 1: MISCCFG_GPDPCGEN
+ * Bit 0: MISCCFG_GPDLCGEN
+ */
+ uint8_t gpio_pm[TOTAL_GPIO_COMM];
};
typedef struct soc_intel_icelake_config config_t;