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| author | Brandon Breitenstein <brandon.breitenstein@intel.com> | 2020-04-06 15:34:19 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-20 09:13:27 +0000 |
| commit | b7911c8e98f493d29acedaf1542f98ad76700f00 (patch) | |
| tree | 0097d47cae74deb1293dc5b4514f0a8c9fbe5ba8 /src/soc/intel/icelake/chip.h | |
| parent | 71d365d4583064da85e3f6544e2fbd385cf1e8b3 (diff) | |
mainboard/volteer: Update Aux settings for Port 0
On Volteer port 0 (MB PORT) does not have a retimer so the port needs
to be configured for the SOC to handle Aux orientation flipping. This
requires 2 changes setting the TcssAuxOri UPD to 1 for port 0 (Bit 0)
and configuring AUXP and AUXN GPIOs to Native Function 6 so SOC can
control the orientation
BUG=b:145220205
BRANCH=NONE
TEST=booted Volteer proto 2 and verified that the AUX channels flip
when the cable is flipped
Change-Id: Ic81adc24d10322cc305bf0fa4c38514468ea0942
Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40245
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Diffstat (limited to 'src/soc/intel/icelake/chip.h')
0 files changed, 0 insertions, 0 deletions