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authorAngel Pons <th3fanbus@gmail.com>2021-02-19 20:15:43 +0100
committerAngel Pons <th3fanbus@gmail.com>2021-03-01 19:40:31 +0000
commit4ace49c9a292c0caf040fd542299932fac4c9734 (patch)
tree935d72f0094f57c30c02555fe3af18375d7683e2 /src/soc/intel/icelake/bootblock
parent423c9faf63d78511902f9f7979685492fe678dc4 (diff)
soc/intel/icelake: Rename `pch_init()` function
There's two instances of the same function, one for the bootblock and another for romstage. Prefix them with the stage they are executed in. Change-Id: I35e87cd47f3cef8952481d25b54558a546aebb60 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50944 Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/icelake/bootblock')
-rw-r--r--src/soc/intel/icelake/bootblock/bootblock.c2
-rw-r--r--src/soc/intel/icelake/bootblock/pch.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/icelake/bootblock/bootblock.c b/src/soc/intel/icelake/bootblock/bootblock.c
index 54ad85a82e..9f360daf00 100644
--- a/src/soc/intel/icelake/bootblock/bootblock.c
+++ b/src/soc/intel/icelake/bootblock/bootblock.c
@@ -24,5 +24,5 @@ void bootblock_soc_early_init(void)
void bootblock_soc_init(void)
{
report_platform_info();
- pch_init();
+ bootblock_pch_init();
}
diff --git a/src/soc/intel/icelake/bootblock/pch.c b/src/soc/intel/icelake/bootblock/pch.c
index a4166fcf67..7694a104e1 100644
--- a/src/soc/intel/icelake/bootblock/pch.c
+++ b/src/soc/intel/icelake/bootblock/pch.c
@@ -109,7 +109,7 @@ void pch_early_iorange_init(void)
pch_enable_lpc();
}
-void pch_init(void)
+void bootblock_pch_init(void)
{
/*
* Enabling ABASE for accessing PM1_STS, PM1_EN, PM1_CNT,