diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-19 18:50:20 +0100 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-11-21 06:43:29 +0000 |
commit | f67c81fc7030e278cf3dbc906f9ba5e265d843f0 (patch) | |
tree | c89f4856690b80e8aa3c53a51ff2e4dfd553c84f /src/soc/intel/fsp_broadwell_de/Kconfig | |
parent | 433471244b7313dde6bb07d58943bfd0d9957c59 (diff) |
soc/intel/fsp_broadwell_de: Drop support
Relocatable ramstage, postcar stage and C_ENVIRONMENT_BOOTBLOCK are
now mandatory features, which this platform lacks.
Change-Id: I8b6502b0894f9e2b8b1334871d7b6cde65cba7d4
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36984
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/soc/intel/fsp_broadwell_de/Kconfig')
-rw-r--r-- | src/soc/intel/fsp_broadwell_de/Kconfig | 100 |
1 files changed, 0 insertions, 100 deletions
diff --git a/src/soc/intel/fsp_broadwell_de/Kconfig b/src/soc/intel/fsp_broadwell_de/Kconfig deleted file mode 100644 index 4c45f29618..0000000000 --- a/src/soc/intel/fsp_broadwell_de/Kconfig +++ /dev/null @@ -1,100 +0,0 @@ -config SOC_INTEL_FSP_BROADWELL_DE - bool - help - Broadwell-DE support using the Intel FSP. - -if SOC_INTEL_FSP_BROADWELL_DE - -config CPU_SPECIFIC_OPTIONS - def_bool y - select ACPI_INTEL_HARDWARE_SLEEP_VALUES - select ARCH_BOOTBLOCK_X86_32 - select ARCH_VERSTAGE_X86_32 - select ARCH_ROMSTAGE_X86_32 - select ARCH_RAMSTAGE_X86_32 - select SOUTHBRIDGE_INTEL_COMMON_SPI - select SOUTHBRIDGE_INTEL_COMMON_RESET - select SOUTHBRIDGE_INTEL_COMMON_RTC - select PARALLEL_MP - select SMP - select IOAPIC - select SSE2 - select UDELAY_TSC - select SUPPORT_CPU_UCODE_IN_CBFS - select INTEL_DESCRIPTOR_MODE_CAPABLE - select HAVE_SMI_HANDLER - select TSC_MONOTONIC_TIMER - select HAVE_FSP_BIN - select CPU_INTEL_FIRMWARE_INTERFACE_TABLE - select SOC_INTEL_COMMON - select SOC_INTEL_COMMON_BLOCK - select SOC_INTEL_COMMON_BLOCK_IMC - select BOOT_DEVICE_SUPPORTS_WRITES - select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY - -config VBOOT - select VBOOT_STARTS_IN_ROMSTAGE - -config CBFS_SIZE - hex - default 0x200000 - -config HEAP_SIZE - hex - default 0x100000 - -config BOOTBLOCK_CPU_INIT - string - default "soc/intel/fsp_broadwell_de/bootblock/bootblock.c" - -config MMCONF_BASE_ADDRESS - hex - default 0x80000000 - -config MAX_CPUS - int - default 32 - -config CPU_ADDR_BITS - int - default 36 - -config VGA_BIOS - bool - default n - -config IED_REGION_SIZE - hex - default 0x400000 - -config SMM_RESERVED_SIZE - hex - default 0x100000 - -config INTEGRATED_UART - bool "Integrated UART ports" - default y - select DRIVERS_UART_8250IO - select CONSOLE_SERIAL - help - Use Broadwell-DE Integrated UART ports @3F8h and 2F8h. - -config SERIRQ_CONTINUOUS_MODE - bool - default n - help - If you set this option to y, the serial IRQ machine will be - operated in continuous mode. - -config DIMM_SPD_SIZE - int - default 512 - -config HPET_MIN_TICKS - hex - default 0x80 - -## Broadwell-DE Specific FSP Kconfig -source src/soc/intel/fsp_broadwell_de/fsp/Kconfig - -endif # SOC_INTEL_FSP_BROADWELL_DE |