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author | Bora Guvendik <bora.guvendik@intel.com> | 2019-09-27 22:26:49 -0700 |
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committer | Subrata Banik <subrata.banik@intel.com> | 2019-09-30 04:51:31 +0000 |
commit | 6aeed16422df88c697d034ed4688ab44e41fa070 (patch) | |
tree | afba1d4a69204eb6272c8b66e6b00449c3f89d6c /src/soc/intel/fsp_broadwell_de/Kconfig | |
parent | b09d44ef2d6faf9c0f7762b8385b894224d5929a (diff) |
mb/google/drallion: Adjust GPD3 pin termination
Internal pull up need to be enabled for GPD3 as power button pin for
PCH according cometlake pch EDS vol1 section 17-1. Without that pin will
stay floating and hook up XDP can cause system shutdown as power buttone
event will trigger.
BUG=N/A
TEST=Hook up XDP on drallion platform, able to boot up into OS and stay
at power up state.
Change-Id: Idd1befeb14a251b7c0542ca1f99049d07b28fb98
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35666
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Diffstat (limited to 'src/soc/intel/fsp_broadwell_de/Kconfig')
0 files changed, 0 insertions, 0 deletions