diff options
| author | Martin Roth <martinroth@google.com> | 2015-11-18 16:36:40 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2015-11-20 16:36:08 +0100 |
| commit | 5cf5828c02f1a10421417c63a5cd26bfa125a932 (patch) | |
| tree | 5a87e981f6c22b6b68c909437a84a8ebaaaa958f /src/soc/intel/fsp_baytrail | |
| parent | d2e8f6ad33c750853844c5674d1a1a926ad7d93a (diff) | |
fsp1_0: Remove hardcoded microcode locations
These are no longer needed.
Test: Booted minnowmax.
Change-Id: Ie77040f3506464c614760bd4d30280c8113373bd
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: http://review.coreboot.org/12468
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/soc/intel/fsp_baytrail')
| -rw-r--r-- | src/soc/intel/fsp_baytrail/Kconfig | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/soc/intel/fsp_baytrail/Kconfig b/src/soc/intel/fsp_baytrail/Kconfig index ff233083d4..2325d75838 100644 --- a/src/soc/intel/fsp_baytrail/Kconfig +++ b/src/soc/intel/fsp_baytrail/Kconfig @@ -86,10 +86,6 @@ config VGA_BIOS_ID This is the default PCI ID for the Bay Trail graphics devices. This string names the vbios ROM in cbfs. -config CPU_MICROCODE_CBFS_LOC - hex - default 0xfff10040 - config ENABLE_BUILTIN_COM1 bool "Enable built-in legacy Serial Port" help |