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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-08 11:16:06 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-15 05:46:59 +0000 |
commit | 7cdb047ce714378a644b7aa2c1f40a2e1a8d5750 (patch) | |
tree | ed3f8a336d9d8ac6caa48d3713dc4fa7d0d898c9 /src/soc/intel/fsp_baytrail/romstage | |
parent | 544878b56349a74e8cb7a0e9af899b5f7fc246fc (diff) |
cpu/x86/smm: Promote smm_memory_map()
Change-Id: I909e9b5fead317928d3513a677cfab25e3c42f64
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34792
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/fsp_baytrail/romstage')
-rw-r--r-- | src/soc/intel/fsp_baytrail/romstage/romstage.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/soc/intel/fsp_baytrail/romstage/romstage.c b/src/soc/intel/fsp_baytrail/romstage/romstage.c index 52f4dc9d63..35b531a465 100644 --- a/src/soc/intel/fsp_baytrail/romstage/romstage.c +++ b/src/soc/intel/fsp_baytrail/romstage/romstage.c @@ -24,6 +24,7 @@ #include <console/usb.h> #include <cbmem.h> #include <cpu/x86/mtrr.h> +#include <cpu/x86/smm.h> #include <program_loading.h> #include <romstage_handoff.h> #include <timestamp.h> @@ -255,9 +256,11 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr) romstage_handoff_init(prev_sleep_state == ACPI_S3); - post_code(0x4f); + if (CONFIG(SMM_TSEG)) + smm_list_regions(); /* Load the ramstage. */ + post_code(0x4f); run_ramstage(); while (1); } |