diff options
author | Aaron Durbin <adurbin@chromium.org> | 2017-12-15 12:51:49 -0700 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2017-12-17 18:29:08 +0000 |
commit | b4de9ec677f62127e9d5a054232a3ad353fe6aff (patch) | |
tree | e09e91fd2fc8004576938938471dc98add2ba7d6 /src/soc/intel/fsp_baytrail/nvm.c | |
parent | a71276b14eade1d334b682ab481189bd8196e427 (diff) |
soc/intel/fsp_baytrail: remove nvm headers and code
This code is not used at all any longer. Remove it.
BUG=b:69614064
Change-Id: I362280f876a335c0cc1c5691b86f5b27e3b5e2c9
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/22904
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/fsp_baytrail/nvm.c')
-rw-r--r-- | src/soc/intel/fsp_baytrail/nvm.c | 83 |
1 files changed, 0 insertions, 83 deletions
diff --git a/src/soc/intel/fsp_baytrail/nvm.c b/src/soc/intel/fsp_baytrail/nvm.c deleted file mode 100644 index a4a7998a0f..0000000000 --- a/src/soc/intel/fsp_baytrail/nvm.c +++ /dev/null @@ -1,83 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Google Inc. - * Copyright (C) 2014 Sage Electronic Engineering, LLC. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <stdint.h> -#include <stddef.h> -#include <console/console.h> -#include <string.h> -#include <spi-generic.h> -#include <spi_flash.h> -#include <soc/nvm.h> -#include <stdint.h> - -/* This module assumes the flash is memory mapped just below 4GiB in the - * address space for reading. Also this module assumes an area it erased - * when all bytes read as all 0xff's. */ - -static struct spi_flash flash; -static bool spi_flash_init_done; - -static int nvm_init(void) -{ - if (spi_flash_init_done == true) - return 0; - - spi_init(); - if (spi_flash_probe(0, 0, &flash)) { - printk(BIOS_DEBUG, "Could not find SPI device\n"); - return -1; - } - - spi_flash_init_done = true; - return 0; -} - -/* Convert memory mapped pointer to flash offset. */ -static inline uint32_t to_flash_offset(void *p) -{ - return CONFIG_ROM_SIZE + (uintptr_t)p; -} - -int nvm_is_erased(const void *start, size_t size) -{ - const uint8_t *cur = start; - const uint8_t erased_value = 0xff; - - while (size > 0) { - if (*cur != erased_value) - return 0; - cur++; - size--; - } - return 1; -} - -int nvm_erase(void *start, size_t size) -{ - if (nvm_init() < 0) - return -1; - spi_flash_erase(&flash, to_flash_offset(start), size); - return 0; -} - -/* Write data to NVM. Returns 0 on success < 0 on error. */ -int nvm_write(void *start, const void *data, size_t size) -{ - if (nvm_init() < 0) - return -1; - spi_flash_write(&flash, to_flash_offset(start), size, data); - return 0; -} |