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author | Furquan Shaikh <furquan@google.com> | 2018-10-19 12:30:02 -0700 |
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committer | Furquan Shaikh <furquan@google.com> | 2018-10-23 14:35:51 +0000 |
commit | 4881b045e4beabdc7fbd06c65a5fc2f6f8128cf4 (patch) | |
tree | cd6779249e5c0c8738689a6133412f0c0baaeeed /src/soc/intel/fsp_baytrail/lpss.c | |
parent | 1ef2c5303b5847d52d66f4b57cb7d21dae9246a6 (diff) |
soc/intel/common/block/gpio: Configure Tx Disable in IO standby for GPIs
This change updates various PAD_CFG_GPI* macros to configure Tx as
Disabled in IO Standby state. This is done to ensure that the Tx
setting is same in IO Standby state as it was in active state i.e. Tx
disabled.
BUG=b:17553222
Change-Id: If462aee3884cc61a519fb358b84867c695ace251
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/29199
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/fsp_baytrail/lpss.c')
0 files changed, 0 insertions, 0 deletions