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authorFelix Held <felix.held@amd.corp-partner.google.com>2021-10-23 00:34:43 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-10-26 17:44:14 +0000
commit02164027b2c9678bd4f5616e0ec34694da351a2c (patch)
tree58a03e7367db7daca092ab28537ec2949a2c4db1 /src/soc/intel/elkhartlake
parent71dfa82380a682d4e3214bd9e139b45fc3391dff (diff)
cpu/x86: Introduce and use `CPU_X86_LAPIC`
With using a Kconfig option to add the x86 LAPIC support code to the build, there's no need for adding the corresponding directory to subdirs in the CPU/SoC Makefile. Comparing which CPU/SoC Makefiles added (cpu/)x86/mtrr and (cpu/)x86/lapic before this and the corresponding MTRR code selection patch and having verified that all platforms added the MTRR code on that patch shows that soc/example/min86 and soc/intel/quark are the only platforms that don't end up selecting the LAPIC code. So for now the default value of CPU_X86_LAPIC is chosen as y which gets overridden to n in the Kconfig of the two SoCs mentioned above. Change-Id: I6f683ea7ba92c91117017ebc6ad063ec54902b0a Signed-off-by: Angel Pons <th3fanbus@gmail.com> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44228 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/intel/elkhartlake')
-rw-r--r--src/soc/intel/elkhartlake/Makefile.inc1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/elkhartlake/Makefile.inc b/src/soc/intel/elkhartlake/Makefile.inc
index c32ba1f245..3ac46ef2b2 100644
--- a/src/soc/intel/elkhartlake/Makefile.inc
+++ b/src/soc/intel/elkhartlake/Makefile.inc
@@ -3,7 +3,6 @@ ifeq ($(CONFIG_SOC_INTEL_ELKHARTLAKE),y)
subdirs-y += romstage
subdirs-y += ../../../cpu/intel/microcode
subdirs-y += ../../../cpu/intel/turbo
-subdirs-y += ../../../cpu/x86/lapic
# all (bootblock, verstage, romstage, postcar, ramstage)
all-y += gspi.c